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riscv: fix Linux problems with LR and SC ops

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Some of the functions in the Linux toolchain that allocate memory make
use of paired LR and SC instructions, which didn't work properly for
that toolchain.  This patch fixes that so attempting to use those
functions doesn't cause an endless loop of failed SC instructions.

Change-Id: If27696323dd6229a0277818e3744fbdf7180fca7
Reviewed-on: https://gem5-review.googlesource.com/2340
Maintainer: Alec Roelke <ar4jc@virginia.edu>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
This commit is contained in:
Alec Roelke
2017-03-21 12:58:25 -04:00
parent 6b7d30688d
commit a8f1f9811c
7 changed files with 325 additions and 100 deletions
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24
tests/test-progs/insttest/src/riscv/rv64a.cpp
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@@ -40,12 +40,16 @@ int main()
using namespace insttest;
// Memory (LR.W, SC.W)
expect<pair<int64_t, uint64_t>>({-1, 0}, []{
expect<pair<int64_t, int64_t>>({-1, 256}, []{
int32_t mem = -1;
int64_t rs2 = 256;
int64_t rd = A::lr_w(mem);
pair<int64_t, uint64_t> result = A::sc_w(rs2, mem);
return pair<int64_t, uint64_t>(rd, result.second);
int64_t rd;
pair<int64_t, uint64_t> result;
do {
rd = A::lr_w(mem);
result = A::sc_w(rs2, mem);
} while (result.second == 1);
return pair<int64_t, uint64_t>(rd, result.first);
}, "lr.w/sc.w");
expect<pair<bool, int64_t>>({true, 200}, []{
int32_t mem = 200;
@@ -130,12 +134,16 @@ int main()
"amomaxu.w, sign extend");
// Memory (LR.D, SC.D)
expect<pair<int64_t, uint64_t>>({-1, 0}, []{
expect<pair<int64_t, int64_t>>({-1, 256}, []{
int64_t mem = -1;
int64_t rs2 = 256;
int64_t rd = A::lr_d(mem);
pair<int64_t, uint64_t> result = A::sc_d(rs2, mem);
return pair<int64_t, uint64_t>(rd, result.second);
int64_t rd;
pair<int64_t, uint64_t> result;
do {
rd = A::lr_d(mem);
result = A::sc_d(rs2, mem);
} while (result.second == 1);
return pair<int64_t, uint64_t>(rd, result.first);
}, "lr.d/sc.d");
expect<pair<bool, int64_t>>({true, 200}, []{
int64_t mem = 200;