diff --git a/src/cpu/StaticInstFlags.py b/src/cpu/StaticInstFlags.py
index 316aef4fab..8db54430b3 100644
--- a/src/cpu/StaticInstFlags.py
+++ b/src/cpu/StaticInstFlags.py
@@ -99,9 +99,6 @@ class StaticInstFlags(Enum):
         'IsDelayedCommit',  # This microop doesn't commit right away
         'IsLastMicroop',    # This microop ends a microop sequence
         'IsFirstMicroop',   # This microop begins a microop sequence
-        # This flag doesn't do anything yet
-        'IsMicroBranch',    # This microop branches within the microcode for
-                            # a macroop
 
         'IsSquashAfter',     # Squash all uncommitted state after executed
 
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index 00639ad8e5..64ed060aca 100644
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -564,7 +564,6 @@ class BaseDynInst : public ExecContext, public RefCounted
     bool isDelayedCommit() const { return staticInst->isDelayedCommit(); }
     bool isLastMicroop() const { return staticInst->isLastMicroop(); }
     bool isFirstMicroop() const { return staticInst->isFirstMicroop(); }
-    bool isMicroBranch() const { return staticInst->isMicroBranch(); }
     // hardware transactional memory
     bool isHtmStart() const { return staticInst->isHtmStart(); }
     bool isHtmStop() const { return staticInst->isHtmStop(); }
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index 0a871cfc62..f77193a448 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -196,8 +196,6 @@ class StaticInst : public RefCounted, public StaticInstFlags
     bool isDelayedCommit() const { return flags[IsDelayedCommit]; }
     bool isLastMicroop() const { return flags[IsLastMicroop]; }
     bool isFirstMicroop() const { return flags[IsFirstMicroop]; }
-    //This flag doesn't do anything yet
-    bool isMicroBranch() const { return flags[IsMicroBranch]; }
     // hardware transactional memory
     // HtmCmds must be identified as such in order
     // to provide them with necessary memory ordering semantics.