diff --git a/src/mem/cache/prefetch/Prefetcher.py b/src/mem/cache/prefetch/Prefetcher.py index c6d6d00dde..8f0a66fb69 100644 --- a/src/mem/cache/prefetch/Prefetcher.py +++ b/src/mem/cache/prefetch/Prefetcher.py @@ -1,4 +1,4 @@ -# Copyright (c) 2012, 2014, 2019, 2023-2024 Arm Limited +# Copyright (c) 2012, 2014, 2019, 2022-2024 Arm Limited # All rights reserved. # # The license below extends only to copyright in the software and shall @@ -191,6 +191,13 @@ class StridePrefetcher(QueuedPrefetcher): use_requestor_id = Param.Bool(True, "Use requestor id based history") degree = Param.Int(4, "Number of prefetches to generate") + distance = Param.Unsigned( + 0, + "How far ahead of the demand stream to start prefetching. " + "Skip this number of strides ahead of the first identified prefetch, " + "then generate `degree` prefetches at `stride` intervals. " + "A value of zero indicates no skip.", + ) table_assoc = Param.Int(4, "Associativity of the PC table") table_entries = Param.MemorySize("64", "Number of entries of the PC table") diff --git a/src/mem/cache/prefetch/stride.cc b/src/mem/cache/prefetch/stride.cc index b2e4702f20..7b517cecca 100644 --- a/src/mem/cache/prefetch/stride.cc +++ b/src/mem/cache/prefetch/stride.cc @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 Inria - * Copyright (c) 2012-2013, 2015 ARM Limited + * Copyright (c) 2012-2013, 2015, 2022 Arm Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -84,6 +84,7 @@ Stride::Stride(const StridePrefetcherParams &p) threshConf(p.confidence_threshold/100.0), useRequestorId(p.use_requestor_id), degree(p.degree), + distance(p.distance), pcTableInfo(p.table_assoc, p.table_entries, p.table_indexing_policy, p.table_replacement_policy) { @@ -176,7 +177,8 @@ Stride::calculatePrefetch(const PrefetchInfo &pfi, prefetch_stride = (new_stride < 0) ? -blkSize : blkSize; } - Addr new_addr = pf_addr + d * prefetch_stride; + Addr new_addr = pf_addr + distance * prefetch_stride + + d * prefetch_stride; addresses.push_back(AddrPriority(new_addr, 0)); } } else { diff --git a/src/mem/cache/prefetch/stride.hh b/src/mem/cache/prefetch/stride.hh index 41cadbe7d0..cb5d79fd0e 100644 --- a/src/mem/cache/prefetch/stride.hh +++ b/src/mem/cache/prefetch/stride.hh @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 Inria - * Copyright (c) 2012-2013, 2015 ARM Limited + * Copyright (c) 2012-2013, 2015, 2022 Arm Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -105,6 +105,14 @@ class Stride : public Queued const int degree; + /** How far ahead of the demand stream to start prefetching. + * + * Skip this number of strides ahead of the first identified + * prefetch, then generate `degree` prefetches at `stride` + * intervals. A value of zero indicates no skip. + */ + const int distance; + /** * Information used to create a new PC table. All of them behave equally. */