arch,cpu: Remove the idea of a zero register.

This is now handled by using the InvalidRegClass.

Change-Id: If43d8f27cfebc249ec6600847bcfd98c9e94cf40
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49746
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/cpu/simple/base.cc

@@ -85,7 +85,6 @@ BaseSimpleCPU::BaseSimpleCPU(const BaseSimpleCPUParams &p)
     : BaseCPU(p),
       curThread(0),
       branchPred(p.branchPred),
-      zeroReg(p.isa[0]->regClasses().at(IntRegClass).zeroReg()),
       traceData(NULL),
       _status(Idle)
 {

src/cpu/simple/base.hh

@@ -86,8 +86,6 @@ class BaseSimpleCPU : public BaseCPU
     ThreadID curThread;
     branch_prediction::BPredUnit *branchPred;
 
-    const RegIndex zeroReg;
-
     void checkPcEventQueue();
     void swapActiveThread();