arch,cpu,mem,sim: Fold arch/locked_mem.hh into the BaseISA class.

Turn the functions within it into virtual methods on the ISA classes.
Eliminate the implementation in MIPS, which was just copy pasted from
Alpha long ago. Fix some minor style issues in ARM. Remove templating.
Switch from using an "XC" type parameter to using the ThreadContext *
installed in all ISA classes.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1053

Change-Id: I19ee3a8fbe50a4d7907029c2dd2796d0e98e965f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48384
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/arch/SConscript

@@ -59,7 +59,6 @@ env.SwitchingHeaders(
     Split('''
         decoder.hh
         isa.hh
-        locked_mem.hh
         page_size.hh
         pcstate.hh
         vecregs.hh