From a16fd8a592104528bfd89d6b54e6219d8024399b Mon Sep 17 00:00:00 2001
From: Yu-Cheng Chang <rogerycchang@google.com>
Date: Thu, 30 Nov 2023 23:36:26 +0800
Subject: [PATCH] scons: Limit adding fastmodel files and libpath (#629)

The change will only add include and library path if the fastmodel is
required to build. The change will benefit for most of gem5 build.

Change-Id: I98c20bd1470b7227940036199e02bc001e307eac
---
 src/arch/arm/fastmodel/CortexA76/SConscript        | 3 +++
 src/arch/arm/fastmodel/CortexR52/SConscript        | 3 +++
 src/arch/arm/fastmodel/GIC/SConscript              | 3 +++
 src/arch/arm/fastmodel/PL330_DMAC/SConscript       | 3 +++
 src/arch/arm/fastmodel/SConscript                  | 2 ++
 src/arch/arm/fastmodel/iris/SConscript             | 3 +++
 src/arch/arm/fastmodel/reset_controller/SConscript | 3 +++
 7 files changed, 20 insertions(+)

diff --git a/src/arch/arm/fastmodel/CortexA76/SConscript b/src/arch/arm/fastmodel/CortexA76/SConscript
index f3c66063de..8ed2cce634 100644
--- a/src/arch/arm/fastmodel/CortexA76/SConscript
+++ b/src/arch/arm/fastmodel/CortexA76/SConscript
@@ -25,6 +25,9 @@
 
 Import('*')
 
+if not env['CONF']['USE_ARM_FASTMODEL']:
+    Return()
+
 protocol_dir = Dir('..').Dir('protocol')
 
 for name in ('x1', 'x2', 'x3', 'x4'):
diff --git a/src/arch/arm/fastmodel/CortexR52/SConscript b/src/arch/arm/fastmodel/CortexR52/SConscript
index bf3df74483..1ecaad86da 100644
--- a/src/arch/arm/fastmodel/CortexR52/SConscript
+++ b/src/arch/arm/fastmodel/CortexR52/SConscript
@@ -25,6 +25,9 @@
 
 Import('*')
 
+if not env['CONF']['USE_ARM_FASTMODEL']:
+    Return()
+
 protocol_dir = Dir('..').Dir('protocol')
 
 for name in ('x1', 'x2', 'x3', 'x4'):
diff --git a/src/arch/arm/fastmodel/GIC/SConscript b/src/arch/arm/fastmodel/GIC/SConscript
index c56ddd537f..db16c96da0 100644
--- a/src/arch/arm/fastmodel/GIC/SConscript
+++ b/src/arch/arm/fastmodel/GIC/SConscript
@@ -25,6 +25,9 @@
 
 Import('*')
 
+if not env['CONF']['USE_ARM_FASTMODEL']:
+    Return()
+
 protocol_dir = Dir('..').Dir('protocol')
 
 ArmFastModelComponent(File('GIC.sgproj'), File('GIC.lisa'),
diff --git a/src/arch/arm/fastmodel/PL330_DMAC/SConscript b/src/arch/arm/fastmodel/PL330_DMAC/SConscript
index e93b45c1ff..3a68af21a3 100644
--- a/src/arch/arm/fastmodel/PL330_DMAC/SConscript
+++ b/src/arch/arm/fastmodel/PL330_DMAC/SConscript
@@ -25,6 +25,9 @@
 
 Import('*')
 
+if not env['CONF']['USE_ARM_FASTMODEL']:
+    Return()
+
 protocol_dir = Dir('..').Dir('protocol')
 
 ArmFastModelComponent(File('PL330.sgproj'), File('PL330.lisa'),
diff --git a/src/arch/arm/fastmodel/SConscript b/src/arch/arm/fastmodel/SConscript
index 16b2b02e3f..925520a01c 100644
--- a/src/arch/arm/fastmodel/SConscript
+++ b/src/arch/arm/fastmodel/SConscript
@@ -49,6 +49,8 @@ import os.path
 
 if env['CONF']['USE_ARM_FASTMODEL']:
     env.TagImplies('arm fastmodel', 'arm isa')
+else:
+    Return()
 
 def extract_var(name):
     val = env['CONF'].get(name, None)
diff --git a/src/arch/arm/fastmodel/iris/SConscript b/src/arch/arm/fastmodel/iris/SConscript
index 33877195d9..f4d54faeb4 100644
--- a/src/arch/arm/fastmodel/iris/SConscript
+++ b/src/arch/arm/fastmodel/iris/SConscript
@@ -25,6 +25,9 @@
 
 Import('*')
 
+if not env['CONF']['USE_ARM_FASTMODEL']:
+    Return()
+
 SimObject('Iris.py', sim_objects=[
     'IrisTLB', 'IrisMMU', 'IrisInterrupts', 'IrisISA', 'IrisBaseCPU'],
     tags='arm fastmodel')
diff --git a/src/arch/arm/fastmodel/reset_controller/SConscript b/src/arch/arm/fastmodel/reset_controller/SConscript
index 8e5de8ee8b..70ca576865 100644
--- a/src/arch/arm/fastmodel/reset_controller/SConscript
+++ b/src/arch/arm/fastmodel/reset_controller/SConscript
@@ -25,6 +25,9 @@
 
 Import('*')
 
+if not env['CONF']['USE_ARM_FASTMODEL']:
+    Return()
+
 SimObject('FastModelResetControllerExample.py', sim_objects=[
     'FastModelResetControllerExample'], tags='arm fastmodel')