diff --git a/src/cpu/static_inst.cc b/src/cpu/static_inst.cc
index 903e3d7a53..1580759167 100644
--- a/src/cpu/static_inst.cc
+++ b/src/cpu/static_inst.cc
@@ -33,23 +33,6 @@
 namespace gem5
 {
 
-bool
-StaticInst::hasBranchTarget(const TheISA::PCState &pc, ThreadContext *tc,
-                            TheISA::PCState &tgt) const
-{
-    if (isDirectCtrl()) {
-        tgt = branchTarget(pc);
-        return true;
-    }
-
-    if (isIndirectCtrl()) {
-        tgt = branchTarget(tc);
-        return true;
-    }
-
-    return false;
-}
-
 StaticInstPtr
 StaticInst::fetchMicroop(MicroPC upc) const
 {
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index f63baf2f5a..2039644271 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -351,13 +351,6 @@ class StaticInst : public RefCounted, public StaticInstFlags
      */
     virtual TheISA::PCState branchTarget(ThreadContext *tc) const;
 
-    /**
-     * Return true if the instruction is a control transfer, and if so,
-     * return the target address as well.
-     */
-    bool hasBranchTarget(const TheISA::PCState &pc, ThreadContext *tc,
-            TheISA::PCState &tgt) const;
-
     /**
      * Return string representation of disassembled instruction.
      * The default version of this function will call the internal