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cpu: Stop using NumVecElemPerVecReg.

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Use the register classes regName method, or if necessary, the ratio
between the size of the vector register file and the vector element
register file.

Change-Id: Ibf63ce2b3cc3e3cc3261e5a9b8dcbfdc0af5035b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49164
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
This commit is contained in:
Gabe Black
2021-08-10 00:16:54 -07:00
parent 0eba590d01
commit a00a6f953f
5 changed files with 30 additions and 30 deletions
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12
src/cpu/simple_thread.hh
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@@ -313,9 +313,9 @@ class SimpleThread : public ThreadState, public ThreadContext
int flatIndex = isa->flattenVecElemIndex(reg.index());
assert(flatIndex < vecElemRegs.size());
RegVal regVal = readVecElemFlat(flatIndex);
DPRINTF(VecRegs, "Reading element %d of vector reg %d (%d) as"
" %#x.\n", reg.index() % TheISA::NumVecElemPerVecReg,
reg.index() / TheISA::NumVecElemPerVecReg, flatIndex, regVal);
DPRINTF(VecRegs, "Reading vector register element %s (%d) as %#x.\n",
isa->regClasses().at(VecElemClass).regName(reg), flatIndex,
regVal);
return regVal;
}
@@ -395,9 +395,9 @@ class SimpleThread : public ThreadState, public ThreadContext
int flatIndex = isa->flattenVecElemIndex(reg.index());
assert(flatIndex < vecElemRegs.size());
setVecElemFlat(flatIndex, val);
DPRINTF(VecRegs, "Setting element %d of vector reg %d (%d) to"
" %#x.\n", reg.index() % TheISA::NumVecElemPerVecReg,
reg.index() / TheISA::NumVecElemPerVecReg, flatIndex, val);
DPRINTF(VecRegs, "Setting vector register element %s (%d) to %#x.\n",
isa->regClasses().at(VecElemClass).regName(reg), flatIndex,
val);
}
void