cpu: Stop using NumVecElemPerVecReg.

Use the register classes regName method, or if necessary, the ratio
between the size of the vector register file and the vector element
register file.

Change-Id: Ibf63ce2b3cc3e3cc3261e5a9b8dcbfdc0af5035b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49164
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>

src/cpu/o3/inst_queue.cc

@@ -99,11 +99,14 @@ InstructionQueue::InstructionQueue(CPU *cpu_ptr, IEW *iew_ptr,
 {
     assert(fuPool);
 
+    const auto &reg_classes = params.isa[0]->regClasses();
     // Set the number of total physical registers
     // As the vector registers have two addressing modes, they are added twice
     numPhysRegs = params.numPhysIntRegs + params.numPhysFloatRegs +
                     params.numPhysVecRegs +
-                    params.numPhysVecRegs * TheISA::NumVecElemPerVecReg +
+                    params.numPhysVecRegs * (
+                            reg_classes.at(VecElemClass).size() /
+                            reg_classes.at(VecRegClass).size()) +
                     params.numPhysVecPredRegs +
                     params.numPhysCCRegs;