Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem

into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 12f10c174f0eca1ddf74b672414fbe78251f686b

src/cpu/o3/cpu.cc

@@ -384,25 +384,25 @@ FullO3CPU<Impl>::fullCPURegStats()
         .name(name() + ".cpi")
         .desc("CPI: Cycles Per Instruction")
         .precision(6);
-    cpi = simTicks / committedInsts;
+    cpi = numCycles / committedInsts;
 
     totalCpi
         .name(name() + ".cpi_total")
         .desc("CPI: Total CPI of All Threads")
         .precision(6);
-    totalCpi = simTicks / totalCommittedInsts;
+    totalCpi = numCycles / totalCommittedInsts;
 
     ipc
         .name(name() + ".ipc")
         .desc("IPC: Instructions Per Cycle")
         .precision(6);
-    ipc =  committedInsts / simTicks;
+    ipc =  committedInsts / numCycles;
 
     totalIpc
         .name(name() + ".ipc_total")
         .desc("IPC: Total IPC of All Threads")
         .precision(6);
-    totalIpc =  totalCommittedInsts / simTicks;
+    totalIpc =  totalCommittedInsts / numCycles;
 
 }
 

src/cpu/o3/lsq_unit.hh

@@ -33,6 +33,7 @@
 #define __CPU_O3_LSQ_UNIT_HH__
 
 #include <algorithm>
+#include <cstring>
 #include <map>
 #include <queue>
 
@@ -292,7 +293,7 @@ class LSQUnit {
             : inst(NULL), req(NULL), size(0),
               canWB(0), committed(0), completed(0)
         {
-            bzero(data, sizeof(data));
+            std::memset(data, 0, sizeof(data));
         }
 
         /** Constructs a store queue entry for a given instruction. */
@@ -300,7 +301,7 @@ class LSQUnit {
             : inst(_inst), req(NULL), size(0),
               canWB(0), committed(0), completed(0)
         {
-            bzero(data, sizeof(data));
+            std::memset(data, 0, sizeof(data));
         }
 
         /** The store instruction. */