diff --git a/include/gem5/asm/generic/m5ops.h b/include/gem5/asm/generic/m5ops.h index 20f38d31f6..aad927c05b 100644 --- a/include/gem5/asm/generic/m5ops.h +++ b/include/gem5/asm/generic/m5ops.h @@ -80,6 +80,8 @@ #define M5OP_SE_PAGE_FAULT 0x61 #define M5OP_DIST_TOGGLE_SYNC 0x62 +#define M5OP_WORKLOAD 0x70 + #define M5OP_FOREACH \ M5OP(m5_arm, M5OP_ARM) \ @@ -108,7 +110,8 @@ M5OP(m5_work_end, M5OP_WORK_END) \ M5OP(m5_se_syscall, M5OP_SE_SYSCALL) \ M5OP(m5_se_page_fault, M5OP_SE_PAGE_FAULT) \ - M5OP(m5_dist_toggle_sync, M5OP_DIST_TOGGLE_SYNC) + M5OP(m5_dist_toggle_sync, M5OP_DIST_TOGGLE_SYNC) \ + M5OP(m5_workload, M5OP_WORKLOAD) \ #define M5OP_MERGE_TOKENS_I(a, b) a##b #define M5OP_MERGE_TOKENS(a, b) M5OP_MERGE_TOKENS_I(a, b) diff --git a/include/gem5/m5ops.h b/include/gem5/m5ops.h index fddbf534fa..1caab225e0 100644 --- a/include/gem5/m5ops.h +++ b/include/gem5/m5ops.h @@ -68,6 +68,14 @@ void m5_work_end(uint64_t workid, uint64_t threadid); void m5_se_syscall(); void m5_se_page_fault(); +/* + * Send a very generic poke to the workload so it can do something. It's up to + * the workload to know what information to look for to interpret an event, + * such as what PC it came from, what register values are, or the context of + * the workload itself (is this SE mode? which OS is running?). + */ +void m5_workload(); + #ifdef __cplusplus } #endif diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc index a50937438e..03014c0c60 100644 --- a/src/sim/pseudo_inst.cc +++ b/src/sim/pseudo_inst.cc @@ -489,6 +489,13 @@ togglesync(ThreadContext *tc) DistIface::toggleSync(tc); } +void +triggerWorkloadEvent(ThreadContext *tc) +{ + DPRINTF(PseudoInst, "PseudoInst::triggerWorkloadEvent()\n"); + tc->getSystemPtr()->workload->event(tc); +} + // // This function is executed when annotated work items begin. Depending on // what the user specified at the command line, the simulation may exit and/or diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh index c32243ae2f..e5c4fe5920 100644 --- a/src/sim/pseudo_inst.hh +++ b/src/sim/pseudo_inst.hh @@ -113,6 +113,7 @@ void workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid); void workend(ThreadContext *tc, uint64_t workid, uint64_t threadid); void m5Syscall(ThreadContext *tc); void togglesync(ThreadContext *tc); +void triggerWorkloadEvent(ThreadContext *tc); /** * Execute a decoded M5 pseudo instruction @@ -254,6 +255,10 @@ pseudoInstWork(ThreadContext *tc, uint8_t func, uint64_t &result) invokeSimcall(tc, togglesync); return true; + case M5OP_WORKLOAD: + invokeSimcall(tc, triggerWorkloadEvent); + return true; + default: warn("Unhandled m5 op: %#x\n", func); return false; diff --git a/src/sim/se_workload.hh b/src/sim/se_workload.hh index 8deb03b31d..16c3f226cb 100644 --- a/src/sim/se_workload.hh +++ b/src/sim/se_workload.hh @@ -78,6 +78,9 @@ class SEWorkload : public Workload } void syscall(ThreadContext *tc) override; + + // For now, assume the only type of events are system calls. + void event(ThreadContext *tc) override { syscall(tc); } }; #endif // __SIM_SE_WORKLOAD_HH__ diff --git a/src/sim/workload.hh b/src/sim/workload.hh index 60b1cff751..c789b6550e 100644 --- a/src/sim/workload.hh +++ b/src/sim/workload.hh @@ -75,6 +75,12 @@ class Workload : public SimObject panic("syscall() not implemented."); } + virtual void + event(ThreadContext *tc) + { + warn("Unhandled workload event."); + } + /** @{ */ /** * Add a function-based event to the given function, to be looked