From 9fa9840691da9745be5cb75a355a97f714352509 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Thu, 15 Jul 2021 01:39:56 -0700 Subject: [PATCH] scons: Turn the Blob method into a builder. Build the blob .cc and .hh files in the same directory as the file they're based off of. Move the GDB XML files into the arch directories they go with. Change-Id: I12fe48873312c3aba5910989d6e3049ebd5e5bbf Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48136 Reviewed-by: Gabe Black Reviewed-by: Bobby R. Bruce Maintainer: Gabe Black Tested-by: kokoro --- SConstruct | 3 - src/SConscript | 89 +++++++++---------- src/arch/arm/SConscript | 7 -- src/arch/arm/gdb-xml/SConscript | 49 ++++++++++ .../arch/arm}/gdb-xml/aarch64-core.xml | 0 {ext => src/arch/arm}/gdb-xml/aarch64-fpu.xml | 0 {ext => src/arch/arm}/gdb-xml/aarch64.xml | 0 .../arm => src/arch/arm/gdb-xml}/arm-core.xml | 0 .../arch/arm/gdb-xml}/arm-vfpv3.xml | 0 .../arch/arm/gdb-xml}/arm-with-neon.xml | 0 src/arch/arm/remote_gdb.cc | 12 +-- src/arch/mips/SConscript | 2 - src/arch/mips/gdb-xml/SConscript | 33 +++++++ {ext => src/arch/mips}/gdb-xml/mips.xml | 0 src/arch/mips/remote_gdb.cc | 2 +- src/arch/power/SConscript | 6 -- src/arch/power/gdb-xml/SConscript | 38 ++++++++ .../arch/power}/gdb-xml/power-core.xml | 0 {ext => src/arch/power}/gdb-xml/power-fpu.xml | 0 .../arch/power}/gdb-xml/power64-core.xml | 0 .../arch/power}/gdb-xml/powerpc-32.xml | 0 .../arch/power}/gdb-xml/powerpc-64.xml | 0 src/arch/power/remote_gdb.cc | 10 +-- src/arch/riscv/SConscript | 5 -- src/arch/riscv/gdb-xml/SConscript | 50 +++++++++++ .../arch/riscv}/gdb-xml/riscv-64bit-cpu.xml | 0 .../arch/riscv}/gdb-xml/riscv-64bit-csr.xml | 0 .../arch/riscv}/gdb-xml/riscv-64bit-fpu.xml | 0 {ext => src/arch/riscv}/gdb-xml/riscv.xml | 0 src/arch/riscv/remote_gdb.cc | 8 +- 30 files changed, 229 insertions(+), 85 deletions(-) create mode 100644 src/arch/arm/gdb-xml/SConscript rename {ext => src/arch/arm}/gdb-xml/aarch64-core.xml (100%) rename {ext => src/arch/arm}/gdb-xml/aarch64-fpu.xml (100%) rename {ext => src/arch/arm}/gdb-xml/aarch64.xml (100%) rename {ext/gdb-xml/arm => src/arch/arm/gdb-xml}/arm-core.xml (100%) rename {ext/gdb-xml/arm => src/arch/arm/gdb-xml}/arm-vfpv3.xml (100%) rename {ext/gdb-xml/arm => src/arch/arm/gdb-xml}/arm-with-neon.xml (100%) create mode 100644 src/arch/mips/gdb-xml/SConscript rename {ext => src/arch/mips}/gdb-xml/mips.xml (100%) create mode 100644 src/arch/power/gdb-xml/SConscript rename {ext => src/arch/power}/gdb-xml/power-core.xml (100%) rename {ext => src/arch/power}/gdb-xml/power-fpu.xml (100%) rename {ext => src/arch/power}/gdb-xml/power64-core.xml (100%) rename {ext => src/arch/power}/gdb-xml/powerpc-32.xml (100%) rename {ext => src/arch/power}/gdb-xml/powerpc-64.xml (100%) create mode 100644 src/arch/riscv/gdb-xml/SConscript rename {ext => src/arch/riscv}/gdb-xml/riscv-64bit-cpu.xml (100%) rename {ext => src/arch/riscv}/gdb-xml/riscv-64bit-csr.xml (100%) rename {ext => src/arch/riscv}/gdb-xml/riscv-64bit-fpu.xml (100%) rename {ext => src/arch/riscv}/gdb-xml/riscv.xml (100%) diff --git a/SConstruct b/SConstruct index 4091d4b7da..396dc593b3 100755 --- a/SConstruct +++ b/SConstruct @@ -619,9 +619,6 @@ for root, dirs, files in os.walk(ext_dir): main.SConscript(os.path.join(root, 'SConscript'), variant_dir=os.path.join(build_root, build_dir)) -gdb_xml_dir = os.path.join(ext_dir, 'gdb-xml') -Export('gdb_xml_dir') - ######################################################################## # diff --git a/src/SConscript b/src/SConscript index a92dd17b8f..a99f2a134d 100644 --- a/src/SConscript +++ b/src/SConscript @@ -287,71 +287,69 @@ def bytesToCppArray(code, symbol, data): code.dedent() code('};') -def blobToCpp(data, symbol, cpp_code, hpp_code, namespace): +def build_blob(target, source, env): + ''' + Embed an arbitrary blob into the gem5 executable, + and make it accessible to C++ as a byte array. ''' - Convert bytes data into C++ .cpp and .hh uint8_t byte array - code containing that binary data. - :param data: binary data to be converted to C++ - :param symbol: name of the symbol - :param cpp_code: append the generated cpp_code to this object - :param hpp_code: append the generated hpp_code to this object - Also include it in the .cpp file. - :param namespace: namespace to put the symbol into. - ''' - hpp_code('''\ + with open(str(source[0]), 'rb') as f: + data = f.read() + symbol = str(source[1]) + cc, hh = target + + hh_code = code_formatter() + hh_code('''\ #include #include -namespace ${namespace} +namespace gem5 +{ +namespace Blobs { extern const std::size_t ${symbol}_len; extern const std::uint8_t ${symbol}[]; -} +} // namespace Blobs +} // namespace gem5 ''') + hh_code.write(str(hh)) - cpp_code('''\ -#include "blobs/${symbol}.hh" + include_path = os.path.relpath(hh.abspath, env['BUILDDIR']) -namespace ${namespace} + cc_code = code_formatter() + cc_code('''\ +#include "${include_path}" + +namespace gem5 +{ +namespace Blobs { const std::size_t ${symbol}_len = ${{len(data)}}; ''') - bytesToCppArray(cpp_code, symbol, data) - cpp_code('} // namespace ${namespace}') + bytesToCppArray(cc_code, symbol, data) + cc_code(''' +} // namespace Blobs +} // namespace gem5 +''') + cc_code.write(str(cc)) -def Blob(blob_path, symbol): - ''' - Embed an arbitrary blob into the gem5 executable, - and make it accessible to C++ as a byte array. - ''' - blob_path = os.path.abspath(blob_path) - blob_out_dir = os.path.join(env['BUILDDIR'], 'blobs') - path_noext = os.path.join(blob_out_dir, symbol) - cpp_path = path_noext + '.cc' - hpp_path = path_noext + '.hh' - def embedBlob(target, source, env): - with open(str(source[0]), 'rb') as f: - data = f.read() - cpp_code = code_formatter() - hpp_code = code_formatter() - blobToCpp(data, symbol, cpp_code, hpp_code, namespace='Blobs') - cpp_path = str(target[0]) - hpp_path = str(target[1]) - cpp_dir = os.path.split(cpp_path)[0] - if not os.path.exists(cpp_dir): - os.makedirs(cpp_dir) - cpp_code.write(cpp_path) - hpp_code.write(hpp_path) - env.Command([cpp_path, hpp_path], blob_path, - MakeAction(embedBlob, Transform("EMBED BLOB"))) - Source(cpp_path) +blob_action = MakeAction(build_blob, Transform("EMBED BLOB")) + +def blob_emitter(target, source, env): + symbol = str(target[0]) + cc_file = File(symbol + '.cc') + hh_file = File(symbol + '.hh') + return [cc_file, hh_file], [source, Value(symbol)] + +blob_builder = Builder(action=blob_action, emitter=blob_emitter) +env.Append(BUILDERS={'Blob': blob_builder}) def GdbXml(xml_id, symbol): - Blob(os.path.join(gdb_xml_dir, xml_id), symbol) + cc, hh = env.Blob(symbol, xml_id) + Source(cc) class Source(SourceFile): pass @@ -594,7 +592,6 @@ class Gem5(Executable): # Children should have access -Export('Blob') Export('GdbXml') Export('Source') Export('PySource') diff --git a/src/arch/arm/SConscript b/src/arch/arm/SConscript index 9da8ff9b6b..ac004dd9d1 100644 --- a/src/arch/arm/SConscript +++ b/src/arch/arm/SConscript @@ -118,10 +118,3 @@ if env['TARGET_ISA'] == 'arm': # Add files generated by the ISA description. ISADesc('isa/main.isa', decoder_splits=3, exec_splits=6) - - GdbXml('arm/arm-with-neon.xml', 'gdb_xml_arm_target') - GdbXml('arm/arm-core.xml', 'gdb_xml_arm_core') - GdbXml('arm/arm-vfpv3.xml', 'gdb_xml_arm_vfpv3') - GdbXml('aarch64.xml', 'gdb_xml_aarch64_target') - GdbXml('aarch64-core.xml', 'gdb_xml_aarch64_core') - GdbXml('aarch64-fpu.xml', 'gdb_xml_aarch64_fpu') diff --git a/src/arch/arm/gdb-xml/SConscript b/src/arch/arm/gdb-xml/SConscript new file mode 100644 index 0000000000..83097ef6f9 --- /dev/null +++ b/src/arch/arm/gdb-xml/SConscript @@ -0,0 +1,49 @@ +# -*- mode:python -*- + +# Copyright (c) 2009, 2012-2013, 2017-2018, 2020 ARM Limited +# All rights reserved. +# +# The license below extends only to copyright in the software and shall +# not be construed as granting a license to any other intellectual +# property including but not limited to intellectual property relating +# to a hardware implementation of the functionality of the software +# licensed hereunder. You may use the software subject to the license +# terms below provided that you ensure that this notice is replicated +# unmodified and in its entirety in all distributions of the software, +# modified or unmodified, in source code or in binary form. +# +# Copyright (c) 2007-2008 The Florida State University +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +Import('*') + +if env['TARGET_ISA'] == 'arm': + GdbXml('arm-with-neon.xml', 'gdb_xml_arm_target') + GdbXml('arm-core.xml', 'gdb_xml_arm_core') + GdbXml('arm-vfpv3.xml', 'gdb_xml_arm_vfpv3') + GdbXml('aarch64.xml', 'gdb_xml_aarch64_target') + GdbXml('aarch64-core.xml', 'gdb_xml_aarch64_core') + GdbXml('aarch64-fpu.xml', 'gdb_xml_aarch64_fpu') diff --git a/ext/gdb-xml/aarch64-core.xml b/src/arch/arm/gdb-xml/aarch64-core.xml similarity index 100% rename from ext/gdb-xml/aarch64-core.xml rename to src/arch/arm/gdb-xml/aarch64-core.xml diff --git a/ext/gdb-xml/aarch64-fpu.xml b/src/arch/arm/gdb-xml/aarch64-fpu.xml similarity index 100% rename from ext/gdb-xml/aarch64-fpu.xml rename to src/arch/arm/gdb-xml/aarch64-fpu.xml diff --git a/ext/gdb-xml/aarch64.xml b/src/arch/arm/gdb-xml/aarch64.xml similarity index 100% rename from ext/gdb-xml/aarch64.xml rename to src/arch/arm/gdb-xml/aarch64.xml diff --git a/ext/gdb-xml/arm/arm-core.xml b/src/arch/arm/gdb-xml/arm-core.xml similarity index 100% rename from ext/gdb-xml/arm/arm-core.xml rename to src/arch/arm/gdb-xml/arm-core.xml diff --git a/ext/gdb-xml/arm/arm-vfpv3.xml b/src/arch/arm/gdb-xml/arm-vfpv3.xml similarity index 100% rename from ext/gdb-xml/arm/arm-vfpv3.xml rename to src/arch/arm/gdb-xml/arm-vfpv3.xml diff --git a/ext/gdb-xml/arm/arm-with-neon.xml b/src/arch/arm/gdb-xml/arm-with-neon.xml similarity index 100% rename from ext/gdb-xml/arm/arm-with-neon.xml rename to src/arch/arm/gdb-xml/arm-with-neon.xml diff --git a/src/arch/arm/remote_gdb.cc b/src/arch/arm/remote_gdb.cc index 51920b4c6d..d14e1c1772 100644 --- a/src/arch/arm/remote_gdb.cc +++ b/src/arch/arm/remote_gdb.cc @@ -136,6 +136,12 @@ #include #include "arch/arm/decoder.hh" +#include "arch/arm/gdb-xml/gdb_xml_aarch64_core.hh" +#include "arch/arm/gdb-xml/gdb_xml_aarch64_fpu.hh" +#include "arch/arm/gdb-xml/gdb_xml_aarch64_target.hh" +#include "arch/arm/gdb-xml/gdb_xml_arm_core.hh" +#include "arch/arm/gdb-xml/gdb_xml_arm_target.hh" +#include "arch/arm/gdb-xml/gdb_xml_arm_vfpv3.hh" #include "arch/arm/pagetable.hh" #include "arch/arm/regs/vec.hh" #include "arch/arm/system.hh" @@ -146,12 +152,6 @@ #include "base/remote_gdb.hh" #include "base/socket.hh" #include "base/trace.hh" -#include "blobs/gdb_xml_aarch64_core.hh" -#include "blobs/gdb_xml_aarch64_fpu.hh" -#include "blobs/gdb_xml_aarch64_target.hh" -#include "blobs/gdb_xml_arm_core.hh" -#include "blobs/gdb_xml_arm_target.hh" -#include "blobs/gdb_xml_arm_vfpv3.hh" #include "cpu/static_inst.hh" #include "cpu/thread_context.hh" #include "cpu/thread_state.hh" diff --git a/src/arch/mips/SConscript b/src/arch/mips/SConscript index e9b0643178..839bc3739f 100644 --- a/src/arch/mips/SConscript +++ b/src/arch/mips/SConscript @@ -53,5 +53,3 @@ if env['TARGET_ISA'] == 'mips': DebugFlag('MipsPRA') ISADesc('isa/main.isa') - - GdbXml('mips.xml', 'gdb_xml_mips') diff --git a/src/arch/mips/gdb-xml/SConscript b/src/arch/mips/gdb-xml/SConscript new file mode 100644 index 0000000000..a2a1afaa6b --- /dev/null +++ b/src/arch/mips/gdb-xml/SConscript @@ -0,0 +1,33 @@ +# -*- mode:python -*- + +# Copyright (c) 2004-2006 The Regents of The University of Michigan +# Copyright (c) 2020 LabWare +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +Import('*') + +if env['TARGET_ISA'] == 'mips': + GdbXml('mips.xml', 'gdb_xml_mips') diff --git a/ext/gdb-xml/mips.xml b/src/arch/mips/gdb-xml/mips.xml similarity index 100% rename from ext/gdb-xml/mips.xml rename to src/arch/mips/gdb-xml/mips.xml diff --git a/src/arch/mips/remote_gdb.cc b/src/arch/mips/remote_gdb.cc index 6940a6770c..bf845baf76 100644 --- a/src/arch/mips/remote_gdb.cc +++ b/src/arch/mips/remote_gdb.cc @@ -136,10 +136,10 @@ #include #include "arch/mips/decoder.hh" +#include "arch/mips/gdb-xml/gdb_xml_mips.hh" #include "arch/mips/regs/float.hh" #include "arch/mips/regs/int.hh" #include "arch/mips/regs/misc.hh" -#include "blobs/gdb_xml_mips.hh" #include "cpu/thread_state.hh" #include "debug/GDBAcc.hh" #include "debug/GDBMisc.hh" diff --git a/src/arch/power/SConscript b/src/arch/power/SConscript index 72979f5c03..7138cdb610 100644 --- a/src/arch/power/SConscript +++ b/src/arch/power/SConscript @@ -59,9 +59,3 @@ if env['TARGET_ISA'] == 'power': DebugFlag('Power') ISADesc('isa/main.isa') - - GdbXml('power-core.xml', 'gdb_xml_power_core') - GdbXml('power64-core.xml', 'gdb_xml_power64_core') - GdbXml('power-fpu.xml', 'gdb_xml_power_fpu') - GdbXml('powerpc-32.xml', 'gdb_xml_powerpc_32') - GdbXml('powerpc-64.xml', 'gdb_xml_powerpc_64') diff --git a/src/arch/power/gdb-xml/SConscript b/src/arch/power/gdb-xml/SConscript new file mode 100644 index 0000000000..58b874e33e --- /dev/null +++ b/src/arch/power/gdb-xml/SConscript @@ -0,0 +1,38 @@ +# -*- mode:python -*- + +# Copyright (c) 2009 The University of Edinburgh +# Copyright (c) 2020 LabWare +# Copyright (c) 2021 IBM Corporation +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +Import('*') + +if env['TARGET_ISA'] == 'power': + GdbXml('power-core.xml', 'gdb_xml_power_core') + GdbXml('power64-core.xml', 'gdb_xml_power64_core') + GdbXml('power-fpu.xml', 'gdb_xml_power_fpu') + GdbXml('powerpc-32.xml', 'gdb_xml_powerpc_32') + GdbXml('powerpc-64.xml', 'gdb_xml_powerpc_64') diff --git a/ext/gdb-xml/power-core.xml b/src/arch/power/gdb-xml/power-core.xml similarity index 100% rename from ext/gdb-xml/power-core.xml rename to src/arch/power/gdb-xml/power-core.xml diff --git a/ext/gdb-xml/power-fpu.xml b/src/arch/power/gdb-xml/power-fpu.xml similarity index 100% rename from ext/gdb-xml/power-fpu.xml rename to src/arch/power/gdb-xml/power-fpu.xml diff --git a/ext/gdb-xml/power64-core.xml b/src/arch/power/gdb-xml/power64-core.xml similarity index 100% rename from ext/gdb-xml/power64-core.xml rename to src/arch/power/gdb-xml/power64-core.xml diff --git a/ext/gdb-xml/powerpc-32.xml b/src/arch/power/gdb-xml/powerpc-32.xml similarity index 100% rename from ext/gdb-xml/powerpc-32.xml rename to src/arch/power/gdb-xml/powerpc-32.xml diff --git a/ext/gdb-xml/powerpc-64.xml b/src/arch/power/gdb-xml/powerpc-64.xml similarity index 100% rename from ext/gdb-xml/powerpc-64.xml rename to src/arch/power/gdb-xml/powerpc-64.xml diff --git a/src/arch/power/remote_gdb.cc b/src/arch/power/remote_gdb.cc index 255434857f..0accb6ad97 100644 --- a/src/arch/power/remote_gdb.cc +++ b/src/arch/power/remote_gdb.cc @@ -137,12 +137,12 @@ #include +#include "arch/power/gdb-xml/gdb_xml_power64_core.hh" +#include "arch/power/gdb-xml/gdb_xml_power_core.hh" +#include "arch/power/gdb-xml/gdb_xml_power_fpu.hh" +#include "arch/power/gdb-xml/gdb_xml_powerpc_32.hh" +#include "arch/power/gdb-xml/gdb_xml_powerpc_64.hh" #include "arch/power/regs/misc.hh" -#include "blobs/gdb_xml_power64_core.hh" -#include "blobs/gdb_xml_power_core.hh" -#include "blobs/gdb_xml_power_fpu.hh" -#include "blobs/gdb_xml_powerpc_32.hh" -#include "blobs/gdb_xml_powerpc_64.hh" #include "cpu/thread_state.hh" #include "debug/GDBAcc.hh" #include "debug/GDBMisc.hh" diff --git a/src/arch/riscv/SConscript b/src/arch/riscv/SConscript index 33844ea5eb..17186c030a 100644 --- a/src/arch/riscv/SConscript +++ b/src/arch/riscv/SConscript @@ -77,8 +77,3 @@ if env['TARGET_ISA'] == 'riscv': # Add in files generated by the ISA description. ISADesc('isa/main.isa') - - GdbXml('riscv.xml', 'gdb_xml_riscv_target') - GdbXml('riscv-64bit-cpu.xml', 'gdb_xml_riscv_cpu') - GdbXml('riscv-64bit-fpu.xml', 'gdb_xml_riscv_fpu') - GdbXml('riscv-64bit-csr.xml', 'gdb_xml_riscv_csr') diff --git a/src/arch/riscv/gdb-xml/SConscript b/src/arch/riscv/gdb-xml/SConscript new file mode 100644 index 0000000000..e4fdf911d6 --- /dev/null +++ b/src/arch/riscv/gdb-xml/SConscript @@ -0,0 +1,50 @@ +# -*- mode:python -*- + +# Copyright (c) 2013 ARM Limited +# Copyright (c) 2014 Sven Karlsson +# Copyright (c) 2020 Barkhausen Institut +# Copyright (c) 2021 Huawei International +# All rights reserved +# +# The license below extends only to copyright in the software and shall +# not be construed as granting a license to any other intellectual +# property including but not limited to intellectual property relating +# to a hardware implementation of the functionality of the software +# licensed hereunder. You may use the software subject to the license +# terms below provided that you ensure that this notice is replicated +# unmodified and in its entirety in all distributions of the software, +# modified or unmodified, in source code or in binary form. +# +# Copyright (c) 2016 The University of Virginia +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +Import('*') + +if env['TARGET_ISA'] == 'riscv': + GdbXml('riscv.xml', 'gdb_xml_riscv_target') + GdbXml('riscv-64bit-cpu.xml', 'gdb_xml_riscv_cpu') + GdbXml('riscv-64bit-fpu.xml', 'gdb_xml_riscv_fpu') + GdbXml('riscv-64bit-csr.xml', 'gdb_xml_riscv_csr') diff --git a/ext/gdb-xml/riscv-64bit-cpu.xml b/src/arch/riscv/gdb-xml/riscv-64bit-cpu.xml similarity index 100% rename from ext/gdb-xml/riscv-64bit-cpu.xml rename to src/arch/riscv/gdb-xml/riscv-64bit-cpu.xml diff --git a/ext/gdb-xml/riscv-64bit-csr.xml b/src/arch/riscv/gdb-xml/riscv-64bit-csr.xml similarity index 100% rename from ext/gdb-xml/riscv-64bit-csr.xml rename to src/arch/riscv/gdb-xml/riscv-64bit-csr.xml diff --git a/ext/gdb-xml/riscv-64bit-fpu.xml b/src/arch/riscv/gdb-xml/riscv-64bit-fpu.xml similarity index 100% rename from ext/gdb-xml/riscv-64bit-fpu.xml rename to src/arch/riscv/gdb-xml/riscv-64bit-fpu.xml diff --git a/ext/gdb-xml/riscv.xml b/src/arch/riscv/gdb-xml/riscv.xml similarity index 100% rename from ext/gdb-xml/riscv.xml rename to src/arch/riscv/gdb-xml/riscv.xml diff --git a/src/arch/riscv/remote_gdb.cc b/src/arch/riscv/remote_gdb.cc index aa5e423203..ec3eb5a0a5 100644 --- a/src/arch/riscv/remote_gdb.cc +++ b/src/arch/riscv/remote_gdb.cc @@ -135,16 +135,16 @@ #include +#include "arch/riscv/gdb-xml/gdb_xml_riscv_cpu.hh" +#include "arch/riscv/gdb-xml/gdb_xml_riscv_csr.hh" +#include "arch/riscv/gdb-xml/gdb_xml_riscv_fpu.hh" +#include "arch/riscv/gdb-xml/gdb_xml_riscv_target.hh" #include "arch/riscv/mmu.hh" #include "arch/riscv/pagetable_walker.hh" #include "arch/riscv/regs/float.hh" #include "arch/riscv/regs/int.hh" #include "arch/riscv/regs/misc.hh" #include "arch/riscv/tlb.hh" -#include "blobs/gdb_xml_riscv_cpu.hh" -#include "blobs/gdb_xml_riscv_csr.hh" -#include "blobs/gdb_xml_riscv_fpu.hh" -#include "blobs/gdb_xml_riscv_target.hh" #include "cpu/thread_state.hh" #include "debug/GDBAcc.hh" #include "mem/page_table.hh"