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ruby: remove cntrl_id from python config scripts.

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This commit is contained in:
Nilay Vaish
2014-01-04 00:03:32 -06:00
parent 5b1804e3bd
commit 9ec59e8b69
6 changed files with 0 additions and 72 deletions
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10
configs/ruby/MI_example.py
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@@ -64,8 +64,6 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
#
block_size_bits = int(math.log(options.cacheline_size, 2))
cntrl_count = 0
for i in xrange(options.num_cpus):
#
# First create the Ruby objects associated with this cpu
@@ -80,7 +78,6 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
# Only one unified L1 cache exists. Can cache instructions and data.
#
l1_cntrl = L1Cache_Controller(version = i,
cntrl_id = cntrl_count,
cacheMemory = cache,
send_evictions = (
options.cpu_type == "detailed"),
@@ -104,8 +101,6 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
cpu_sequencers.append(cpu_seq)
l1_cntrl_nodes.append(l1_cntrl)
cntrl_count += 1
phys_mem_size = sum(map(lambda r: r.size(), system.mem_ranges))
assert(phys_mem_size % options.num_dirs == 0)
mem_module_size = phys_mem_size / options.num_dirs
@@ -131,7 +126,6 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
dir_size.value = mem_module_size
dir_cntrl = Directory_Controller(version = i,
cntrl_id = cntrl_count,
directory = \
RubyDirectoryMemory( \
version = i,
@@ -146,8 +140,6 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
exec("ruby_system.dir_cntrl%d = dir_cntrl" % i)
dir_cntrl_nodes.append(dir_cntrl)
cntrl_count += 1
for i, dma_port in enumerate(dma_ports):
#
# Create the Ruby objects associated with the dma controller
@@ -156,7 +148,6 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
ruby_system = ruby_system)
dma_cntrl = DMA_Controller(version = i,
cntrl_id = cntrl_count,
dma_sequencer = dma_seq,
transitions_per_cycle = options.ports,
ruby_system = ruby_system)
@@ -164,7 +155,6 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
exec("ruby_system.dma_cntrl%d = dma_cntrl" % i)
exec("ruby_system.dma_cntrl%d.dma_sequencer.slave = dma_port" % i)
dma_cntrl_nodes.append(dma_cntrl)
cntrl_count += 1
all_cntrls = l1_cntrl_nodes + dir_cntrl_nodes + dma_cntrl_nodes