Move to a model with a unified request object.

Constructor takes a bool to signify that it is either a cpu_request or not a cpu_request.
When accedding variables of a cpu_request it asserts that it is a cpu_request.
It also asserts that a value being read has been written at some point in time prior (not gaurnteeing it is up to date, but it was at least written before read).

There is also a isCpuReq() function to determine if this is a cpu_request.  It should be called before accesing a cpu_request only variable.

SConscript:
    Add compilation support for request.cc
arch/alpha/tlb.cc:
arch/alpha/tlb.hh:
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
dev/io_device.cc:
mem/page_table.cc:
mem/page_table.hh:
mem/port.cc:
    Update for unified request object and accessor functions.
mem/request.hh:
    Remove CpuRequest, make it a unified object.  Make variables private with accessor functions.

    May want to move things from .cc file into header (usually a assert() and either returning a value, or writting two).

--HG--
extra : convert_revision : f1e45cc490dadc7a418634539b03c3e72684a6e3

dev/io_device.cc

@@ -78,7 +78,7 @@ bool
 PioPort::recvTiming(Packet &pkt)
 {
     device->recvAtomic(pkt);
-    sendTiming(pkt, pkt.time-pkt.req->time);
+    sendTiming(pkt, pkt.time-pkt.req->getTime());
     return Success;
 }
 
@@ -132,7 +132,7 @@ DmaPort::dmaAction(Command cmd, DmaPort port, Addr addr, int size,
 
     int prevSize = 0;
     Packet basePkt;
-    Request baseReq;
+    Request baseReq(false);
 
     basePkt.flags = 0;
     basePkt.coherence = NULL;
@@ -142,8 +142,8 @@ DmaPort::dmaAction(Command cmd, DmaPort port, Addr addr, int size,
     basePkt.cmd = cmd;
     basePkt.result = Unknown;
     basePkt.req = NULL;
-    baseReq.nicReq = true;
-    baseReq.time = curTick;
+//    baseReq.nicReq = true;
+    baseReq.setTime(curTick);
 
     completionEvent = event;
 
@@ -154,8 +154,8 @@ DmaPort::dmaAction(Command cmd, DmaPort port, Addr addr, int size,
             pkt->addr = gen.addr();
             pkt->size = gen.size();
             pkt->req = req;
-            pkt->req->paddr = pkt->addr;
-            pkt->req->size = pkt->size;
+            pkt->req->setPaddr(pkt->addr);
+            pkt->req->setSize(pkt->size);
             // Increment the data pointer on a write
             pkt->data = data ? data + prevSize : NULL ;
             prevSize += pkt->size;
@@ -178,7 +178,7 @@ DmaPort::sendDma(Packet &pkt)
            transmitList.push_back(&packet);
    } else if (state == Atomic) {*/
        sendAtomic(pkt);
-       completionEvent->schedule(pkt.time - pkt.req->time);
+       completionEvent->schedule(pkt.time - pkt.req->getTime());
        completionEvent = NULL;
 /*   } else if (state == Functional) {
        sendFunctional(pkt);