From 9ddfe0964953ecb221b044d8ef26920cb5205482 Mon Sep 17 00:00:00 2001 From: Kyle Roarty Date: Fri, 28 Jun 2019 15:19:56 -0400 Subject: [PATCH] arch-vega: Add Vega-specific opcodes The opcodes aren't implemented yet, returning nullptr Change-Id: I700c2158035aea84e6365a32d53304accab59d96 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42208 Tested-by: kokoro Reviewed-by: Matt Sinclair Maintainer: Matt Sinclair --- src/arch/amdgpu/vega/decoder.cc | 1722 +++++++++++++++++++++++---- src/arch/amdgpu/vega/gpu_decoder.hh | 182 ++- 2 files changed, 1668 insertions(+), 236 deletions(-) diff --git a/src/arch/amdgpu/vega/decoder.cc b/src/arch/amdgpu/vega/decoder.cc index 30153137ba..5be0d3d205 100644 --- a/src/arch/amdgpu/vega/decoder.cc +++ b/src/arch/amdgpu/vega/decoder.cc @@ -153,30 +153,30 @@ namespace VegaISA &Decoder::decode_OP_VOP2__V_MADAK_F32, &Decoder::decode_OP_VOP2__V_MADAK_F32, &Decoder::decode_OP_VOP2__V_MADAK_F32, - &Decoder::decode_OP_VOP2__V_ADD_U32, - &Decoder::decode_OP_VOP2__V_ADD_U32, - &Decoder::decode_OP_VOP2__V_ADD_U32, - &Decoder::decode_OP_VOP2__V_ADD_U32, - &Decoder::decode_OP_VOP2__V_SUB_U32, - &Decoder::decode_OP_VOP2__V_SUB_U32, - &Decoder::decode_OP_VOP2__V_SUB_U32, - &Decoder::decode_OP_VOP2__V_SUB_U32, - &Decoder::decode_OP_VOP2__V_SUBREV_U32, - &Decoder::decode_OP_VOP2__V_SUBREV_U32, - &Decoder::decode_OP_VOP2__V_SUBREV_U32, - &Decoder::decode_OP_VOP2__V_SUBREV_U32, - &Decoder::decode_OP_VOP2__V_ADDC_U32, - &Decoder::decode_OP_VOP2__V_ADDC_U32, - &Decoder::decode_OP_VOP2__V_ADDC_U32, - &Decoder::decode_OP_VOP2__V_ADDC_U32, - &Decoder::decode_OP_VOP2__V_SUBB_U32, - &Decoder::decode_OP_VOP2__V_SUBB_U32, - &Decoder::decode_OP_VOP2__V_SUBB_U32, - &Decoder::decode_OP_VOP2__V_SUBB_U32, - &Decoder::decode_OP_VOP2__V_SUBBREV_U32, - &Decoder::decode_OP_VOP2__V_SUBBREV_U32, - &Decoder::decode_OP_VOP2__V_SUBBREV_U32, - &Decoder::decode_OP_VOP2__V_SUBBREV_U32, + &Decoder::decode_OP_VOP2__V_ADD_CO_U32, + &Decoder::decode_OP_VOP2__V_ADD_CO_U32, + &Decoder::decode_OP_VOP2__V_ADD_CO_U32, + &Decoder::decode_OP_VOP2__V_ADD_CO_U32, + &Decoder::decode_OP_VOP2__V_SUB_CO_U32, + &Decoder::decode_OP_VOP2__V_SUB_CO_U32, + &Decoder::decode_OP_VOP2__V_SUB_CO_U32, + &Decoder::decode_OP_VOP2__V_SUB_CO_U32, + &Decoder::decode_OP_VOP2__V_SUBREV_CO_U32, + &Decoder::decode_OP_VOP2__V_SUBREV_CO_U32, + &Decoder::decode_OP_VOP2__V_SUBREV_CO_U32, + &Decoder::decode_OP_VOP2__V_SUBREV_CO_U32, + &Decoder::decode_OP_VOP2__V_ADDC_CO_U32, + &Decoder::decode_OP_VOP2__V_ADDC_CO_U32, + &Decoder::decode_OP_VOP2__V_ADDC_CO_U32, + &Decoder::decode_OP_VOP2__V_ADDC_CO_U32, + &Decoder::decode_OP_VOP2__V_SUBB_CO_U32, + &Decoder::decode_OP_VOP2__V_SUBB_CO_U32, + &Decoder::decode_OP_VOP2__V_SUBB_CO_U32, + &Decoder::decode_OP_VOP2__V_SUBB_CO_U32, + &Decoder::decode_OP_VOP2__V_SUBBREV_CO_U32, + &Decoder::decode_OP_VOP2__V_SUBBREV_CO_U32, + &Decoder::decode_OP_VOP2__V_SUBBREV_CO_U32, + &Decoder::decode_OP_VOP2__V_SUBBREV_CO_U32, &Decoder::decode_OP_VOP2__V_ADD_F16, &Decoder::decode_OP_VOP2__V_ADD_F16, &Decoder::decode_OP_VOP2__V_ADD_F16, @@ -261,18 +261,18 @@ namespace VegaISA &Decoder::decode_OP_VOP2__V_LDEXP_F16, &Decoder::decode_OP_VOP2__V_LDEXP_F16, &Decoder::decode_OP_VOP2__V_LDEXP_F16, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, + &Decoder::decode_OP_VOP2__V_ADD_U32, + &Decoder::decode_OP_VOP2__V_ADD_U32, + &Decoder::decode_OP_VOP2__V_ADD_U32, + &Decoder::decode_OP_VOP2__V_ADD_U32, + &Decoder::decode_OP_VOP2__V_SUB_U32, + &Decoder::decode_OP_VOP2__V_SUB_U32, + &Decoder::decode_OP_VOP2__V_SUB_U32, + &Decoder::decode_OP_VOP2__V_SUB_U32, + &Decoder::decode_OP_VOP2__V_SUBREV_U32, + &Decoder::decode_OP_VOP2__V_SUBREV_U32, + &Decoder::decode_OP_VOP2__V_SUBREV_U32, + &Decoder::decode_OP_VOP2__V_SUBREV_U32, &Decoder::decode_invalid, &Decoder::decode_invalid, &Decoder::decode_invalid, @@ -353,15 +353,15 @@ namespace VegaISA &Decoder::decode_OP_SOP2__S_CBRANCH_G_FORK, &Decoder::decode_OP_SOP2__S_ABSDIFF_I32, &Decoder::decode_OP_SOP2__S_RFE_RESTORE_B64, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, + &Decoder::decode_OP_SOP2__S_MUL_HI_U32, + &Decoder::decode_OP_SOP2__S_MUL_HI_I32, + &Decoder::decode_OP_SOP2__S_LSHL1_ADD_U32, + &Decoder::decode_OP_SOP2__S_LSHL2_ADD_U32, + &Decoder::decode_OP_SOP2__S_LSHL3_ADD_U32, + &Decoder::decode_OP_SOP2__S_LSHL4_ADD_U32, + &Decoder::decode_OP_SOP2__S_PACK_LL_B32_B16, + &Decoder::decode_OP_SOP2__S_PACK_LH_B32_B16, + &Decoder::decode_OP_SOP2__S_HH_B32_B16, &Decoder::decode_invalid, &Decoder::decode_invalid, &Decoder::decode_invalid, @@ -426,7 +426,7 @@ namespace VegaISA &Decoder::decode_OP_SOPK__S_SETREG_B32, &Decoder::decode_invalid, &Decoder::decode_OP_SOPK__S_SETREG_IMM32_B32, - &Decoder::decode_invalid, + &Decoder::decode_OP_SOPK__S_CALL_B64, &Decoder::decode_invalid, &Decoder::decode_invalid, &Decoder::decode_invalid, @@ -476,7 +476,7 @@ namespace VegaISA &Decoder::subDecode_OPU_VOP3, &Decoder::subDecode_OPU_VOP3, &Decoder::decode_invalid, - &Decoder::decode_invalid, + &Decoder::subDecode_OP_VOP3P, &Decoder::subDecode_OP_VINTRP, &Decoder::subDecode_OP_VINTRP, &Decoder::subDecode_OP_VINTRP, @@ -1065,29 +1065,29 @@ namespace VegaISA &Decoder::decode_OPU_VOP3__V_FMA_F16, &Decoder::decode_OPU_VOP3__V_DIV_FIXUP_F16, &Decoder::decode_OPU_VOP3__V_CVT_PKACCUM_U8_F32, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, + &Decoder::decode_OPU_VOP3__V_MAD_U32_U16, + &Decoder::decode_OPU_VOP3__V_MAD_I32_I16, + &Decoder::decode_OPU_VOP3__V_XAD_U32, + &Decoder::decode_OPU_VOP3__V_MIN3_F16, + &Decoder::decode_OPU_VOP3__V_MIN3_I16, + &Decoder::decode_OPU_VOP3__V_MIN3_U16, + &Decoder::decode_OPU_VOP3__V_MAX3_F16, + &Decoder::decode_OPU_VOP3__V_MAX3_I16, + &Decoder::decode_OPU_VOP3__V_MAX3_U16, + &Decoder::decode_OPU_VOP3__V_MED3_F16, + &Decoder::decode_OPU_VOP3__V_MED3_I16, + &Decoder::decode_OPU_VOP3__V_MED3_U16, + &Decoder::decode_OPU_VOP3__V_LSHL_ADD_U32, + &Decoder::decode_OPU_VOP3__V_ADD_LSHL_U32, + &Decoder::decode_OPU_VOP3__V_ADD3_U32, + &Decoder::decode_OPU_VOP3__V_LSHL_OR_B32, + &Decoder::decode_OPU_VOP3__V_AND_OR_B32, + &Decoder::decode_OPU_VOP3__V_OR3_B32, + &Decoder::decode_OPU_VOP3__V_MAD_F16, + &Decoder::decode_OPU_VOP3__V_MAD_U16, + &Decoder::decode_OPU_VOP3__V_MAD_I16, + &Decoder::decode_OPU_VOP3__V_FMA_F16, + &Decoder::decode_OPU_VOP3__V_DIV_FIXUP_F16, &Decoder::decode_invalid, &Decoder::decode_invalid, &Decoder::decode_invalid, @@ -1198,6 +1198,7 @@ namespace VegaISA &Decoder::decode_invalid, &Decoder::decode_OPU_VOP3__V_INTERP_P1LL_F16, &Decoder::decode_OPU_VOP3__V_INTERP_P1LV_F16, + &Decoder::decode_OPU_VOP3__V_INTERP_P2_LEGACY_F16, &Decoder::decode_OPU_VOP3__V_INTERP_P2_F16, &Decoder::decode_invalid, &Decoder::decode_invalid, @@ -1207,7 +1208,6 @@ namespace VegaISA &Decoder::decode_invalid, &Decoder::decode_invalid, &Decoder::decode_invalid, - &Decoder::decode_invalid, &Decoder::decode_OPU_VOP3__V_ADD_F64, &Decoder::decode_OPU_VOP3__V_MUL_F64, &Decoder::decode_OPU_VOP3__V_MIN_F64, @@ -1233,13 +1233,13 @@ namespace VegaISA &Decoder::decode_OPU_VOP3__V_CVT_PKRTZ_F16_F32, &Decoder::decode_OPU_VOP3__V_CVT_PK_U16_U32, &Decoder::decode_OPU_VOP3__V_CVT_PK_I16_I32, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, + &Decoder::decode_OPU_VOP3__V_PKNORM_I16_F16, + &Decoder::decode_OPU_VOP3__V_PKNORM_U16_F16, + &Decoder::decode_OPU_VOP3__V_ADD_I32, + &Decoder::decode_OPU_VOP3__V_SUB_I32, + &Decoder::decode_OPU_VOP3__V_ADD_I16, + &Decoder::decode_OPU_VOP3__V_SUB_I16, + &Decoder::decode_OPU_VOP3__V_PACK_B32_F16, &Decoder::decode_invalid, &Decoder::decode_invalid, &Decoder::decode_invalid, @@ -1368,7 +1368,7 @@ namespace VegaISA &Decoder::decode_invalid, &Decoder::decode_invalid, &Decoder::decode_invalid, - &Decoder::decode_invalid, + &Decoder::decode_OP_DS__DS_WRITE_ADDTID_B32, &Decoder::decode_OP_DS__DS_WRITE_B8, &Decoder::decode_OP_DS__DS_WRITE_B16, &Decoder::decode_OP_DS__DS_ADD_RTN_U32, @@ -1423,14 +1423,14 @@ namespace VegaISA &Decoder::decode_OP_DS__DS_CMPST_F64, &Decoder::decode_OP_DS__DS_MIN_F64, &Decoder::decode_OP_DS__DS_MAX_F64, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, + &Decoder::decode_OP_DS__DS_WRITE_B8_D16_HI, + &Decoder::decode_OP_DS__DS_WRITE_B16_D16_HI, + &Decoder::decode_OP_DS__DS_READ_U8_D16, + &Decoder::decode_OP_DS__DS_READ_U8_D16_HI, + &Decoder::decode_OP_DS__DS_READ_I8_D16, + &Decoder::decode_OP_DS__DS_READ_I8_D16_HI, + &Decoder::decode_OP_DS__DS_READ_U16_D16, + &Decoder::decode_OP_DS__DS_READ_U16_D16_HI, &Decoder::decode_invalid, &Decoder::decode_invalid, &Decoder::decode_invalid, @@ -1521,7 +1521,7 @@ namespace VegaISA &Decoder::decode_invalid, &Decoder::decode_invalid, &Decoder::decode_invalid, - &Decoder::decode_invalid, + &Decoder::decode_OP_DS__DS_READ_ADDTID_B32, &Decoder::decode_invalid, &Decoder::decode_invalid, &Decoder::decode_invalid, @@ -1926,7 +1926,7 @@ namespace VegaISA &Decoder::decode_OP_MIMG__IMAGE_SAMPLE_C_LZ_O, &Decoder::decode_OP_MIMG__IMAGE_GATHER4, &Decoder::decode_OP_MIMG__IMAGE_GATHER4_CL, - &Decoder::decode_invalid, + &Decoder::decode_OP_MIMG__IMAGE_GATHER4H, &Decoder::decode_invalid, &Decoder::decode_OP_MIMG__IMAGE_GATHER4_L, &Decoder::decode_OP_MIMG__IMAGE_GATHER4_B, @@ -1934,8 +1934,8 @@ namespace VegaISA &Decoder::decode_OP_MIMG__IMAGE_GATHER4_LZ, &Decoder::decode_OP_MIMG__IMAGE_GATHER4_C, &Decoder::decode_OP_MIMG__IMAGE_GATHER4_C_CL, - &Decoder::decode_invalid, - &Decoder::decode_invalid, + &Decoder::decode_OP_MIMG__IMAGE_GATHER4H_PCK, + &Decoder::decode_OP_MIMG__IMAGE_GATHER8H_PCK, &Decoder::decode_OP_MIMG__IMAGE_GATHER4_C_L, &Decoder::decode_OP_MIMG__IMAGE_GATHER4_C_B, &Decoder::decode_OP_MIMG__IMAGE_GATHER4_C_B_CL, @@ -2035,21 +2035,21 @@ namespace VegaISA &Decoder::decode_OP_MUBUF__BUFFER_LOAD_DWORDX3, &Decoder::decode_OP_MUBUF__BUFFER_LOAD_DWORDX4, &Decoder::decode_OP_MUBUF__BUFFER_STORE_BYTE, - &Decoder::decode_invalid, + &Decoder::decode_OP_MUBUF__BUFFER_STORE_BYTE_D16_HI, &Decoder::decode_OP_MUBUF__BUFFER_STORE_SHORT, - &Decoder::decode_invalid, + &Decoder::decode_OP_MUBUF__BUFFER_STORE_SHORT_D16_HI, &Decoder::decode_OP_MUBUF__BUFFER_STORE_DWORD, &Decoder::decode_OP_MUBUF__BUFFER_STORE_DWORDX2, &Decoder::decode_OP_MUBUF__BUFFER_STORE_DWORDX3, &Decoder::decode_OP_MUBUF__BUFFER_STORE_DWORDX4, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, + &Decoder::decode_OP_MUBUF__BUFFER_LOAD_UBYTE_D16, + &Decoder::decode_OP_MUBUF__BUFFER_LOAD_UBYTE_D16_HI, + &Decoder::decode_OP_MUBUF__BUFFER_LOAD_SBYTE_D16, + &Decoder::decode_OP_MUBUF__BUFFER_LOAD_SBYTE_D16_HI, + &Decoder::decode_OP_MUBUF__BUFFER_LOAD_SHORT_D16, + &Decoder::decode_OP_MUBUF__BUFFER_LOAD_SHORT_D16_HI, + &Decoder::decode_OP_MUBUF__BUFFER_LOAD_FORMAT_D16_HI_X, + &Decoder::decode_OP_MUBUF__BUFFER_STORE_FORMAT_D16_HI_X, &Decoder::decode_invalid, &Decoder::decode_invalid, &Decoder::decode_invalid, @@ -2277,9 +2277,9 @@ namespace VegaISA &Decoder::decode_OP_SMEM__S_LOAD_DWORDX4, &Decoder::decode_OP_SMEM__S_LOAD_DWORDX8, &Decoder::decode_OP_SMEM__S_LOAD_DWORDX16, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, + &Decoder::decode_OP_SMEM__S_SCRATCH_LOAD_DWORD, + &Decoder::decode_OP_SMEM__S_SCRATCH_LOAD_DWORDX2, + &Decoder::decode_OP_SMEM__S_SCRATCH_LOAD_DWORDX4, &Decoder::decode_OP_SMEM__S_BUFFER_LOAD_DWORD, &Decoder::decode_OP_SMEM__S_BUFFER_LOAD_DWORDX2, &Decoder::decode_OP_SMEM__S_BUFFER_LOAD_DWORDX4, @@ -2293,9 +2293,9 @@ namespace VegaISA &Decoder::decode_OP_SMEM__S_STORE_DWORDX4, &Decoder::decode_invalid, &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, + &Decoder::decode_OP_SMEM__S_SCRATCH_STORE_DWORD, + &Decoder::decode_OP_SMEM__S_SCRATCH_STORE_DWORDX2, + &Decoder::decode_OP_SMEM__S_SCRATCH_STORE_DWORDX4, &Decoder::decode_OP_SMEM__S_BUFFER_STORE_DWORD, &Decoder::decode_OP_SMEM__S_BUFFER_STORE_DWORDX2, &Decoder::decode_OP_SMEM__S_BUFFER_STORE_DWORDX4, @@ -2312,6 +2312,199 @@ namespace VegaISA &Decoder::decode_OP_SMEM__S_MEMREALTIME, &Decoder::decode_OP_SMEM__S_ATC_PROBE, &Decoder::decode_OP_SMEM__S_ATC_PROBE_BUFFER, + &Decoder::decode_OP_SMEM__S_DCACHE_DISCARD, + &Decoder::decode_OP_SMEM__S_DCACHE_DISCARD_X2, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_SWAP, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_CMPSWAP, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_ADD, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_SUB, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_SMIN, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_UMIN, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_SMAX, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_UMAX, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_AND, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_OR, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_XOR, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_INC, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_DEC, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_SWAP_X2, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_CMPSWAP_X2, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_ADD_X2, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_SUB_X2, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_SMIN_X2, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_UMIN_X2, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_SMAX_X2, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_UMAX_X2, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_AND_X2, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_OR_X2, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_XOR_X2, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_INC_X2, + &Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_DEC_X2, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_OP_SMEM__S_ATOMIC_SWAP, + &Decoder::decode_OP_SMEM__S_ATOMIC_CMPSWAP, + &Decoder::decode_OP_SMEM__S_ATOMIC_ADD, + &Decoder::decode_OP_SMEM__S_ATOMIC_SUB, + &Decoder::decode_OP_SMEM__S_ATOMIC_SMIN, + &Decoder::decode_OP_SMEM__S_ATOMIC_UMIN, + &Decoder::decode_OP_SMEM__S_ATOMIC_SMAX, + &Decoder::decode_OP_SMEM__S_ATOMIC_UMAX, + &Decoder::decode_OP_SMEM__S_ATOMIC_AND, + &Decoder::decode_OP_SMEM__S_ATOMIC_OR, + &Decoder::decode_OP_SMEM__S_ATOMIC_XOR, + &Decoder::decode_OP_SMEM__S_ATOMIC_INC, + &Decoder::decode_OP_SMEM__S_ATOMIC_DEC, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_OP_SMEM__S_ATOMIC_SWAP_X2, + &Decoder::decode_OP_SMEM__S_ATOMIC_CMPSWAP_X2, + &Decoder::decode_OP_SMEM__S_ATOMIC_ADD_X2, + &Decoder::decode_OP_SMEM__S_ATOMIC_SUB_X2, + &Decoder::decode_OP_SMEM__S_ATOMIC_SMIN_X2, + &Decoder::decode_OP_SMEM__S_ATOMIC_UMIN_X2, + &Decoder::decode_OP_SMEM__S_ATOMIC_SMAX_X2, + &Decoder::decode_OP_SMEM__S_ATOMIC_UMAX_X2, + &Decoder::decode_OP_SMEM__S_ATOMIC_AND_X2, + &Decoder::decode_OP_SMEM__S_ATOMIC_OR_X2, + &Decoder::decode_OP_SMEM__S_ATOMIC_XOR_X2, + &Decoder::decode_OP_SMEM__S_ATOMIC_INC_X2, + &Decoder::decode_OP_SMEM__S_ATOMIC_DEC_X2, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, &Decoder::decode_invalid, &Decoder::decode_invalid, &Decoder::decode_invalid, @@ -2335,7 +2528,6 @@ namespace VegaISA &Decoder::decode_invalid, &Decoder::decode_invalid, &Decoder::decode_invalid, - &Decoder::decode_invalid }; IsaDecodeMethod Decoder::tableSubDecode_OP_SOP1[] = { @@ -2388,13 +2580,13 @@ namespace VegaISA &Decoder::decode_OP_SOP1__S_CBRANCH_JOIN, &Decoder::decode_invalid, &Decoder::decode_OP_SOP1__S_ABS_I32, - &Decoder::decode_OP_SOP1__S_MOV_FED_B32, + &Decoder::decode_invalid, &Decoder::decode_OP_SOP1__S_SET_GPR_IDX_IDX, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, + &Decoder::decode_OP_SOP1__S_ANDN1_SAVEEXEC_B64, + &Decoder::decode_OP_SOP1__S_ORN1_SAVEEXEC_B64, + &Decoder::decode_OP_SOP1__S_ANDN1_WREXEC_B64, + &Decoder::decode_OP_SOP1__S_ANDN2_WREXEC_B64, + &Decoder::decode_OP_SOP1__S_BITREPLICATE_B64_B32, &Decoder::decode_invalid, &Decoder::decode_invalid, &Decoder::decode_invalid, @@ -2759,7 +2951,7 @@ namespace VegaISA &Decoder::decode_OP_SOPP__S_ENDPGM_SAVED, &Decoder::decode_OP_SOPP__S_SET_GPR_IDX_OFF, &Decoder::decode_OP_SOPP__S_SET_GPR_IDX_MODE, - &Decoder::decode_invalid, + &Decoder::decode_OP_SOPP__S_ENDPGM_ORDERED_PS_DONE, &Decoder::decode_invalid, &Decoder::decode_invalid, &Decoder::decode_invalid, @@ -2876,7 +3068,7 @@ namespace VegaISA &Decoder::decode_OP_VOP1__V_CVT_F32_U32, &Decoder::decode_OP_VOP1__V_CVT_U32_F32, &Decoder::decode_OP_VOP1__V_CVT_I32_F32, - &Decoder::decode_OP_VOP1__V_MOV_FED_B32, + &Decoder::decode_invalid, &Decoder::decode_OP_VOP1__V_CVT_F16_F32, &Decoder::decode_OP_VOP1__V_CVT_F32_F16, &Decoder::decode_OP_VOP1__V_CVT_RPI_I32_F32, @@ -2922,7 +3114,7 @@ namespace VegaISA &Decoder::decode_OP_VOP1__V_FREXP_MANT_F32, &Decoder::decode_OP_VOP1__V_CLREXCP, &Decoder::decode_invalid, - &Decoder::decode_invalid, + &Decoder::decode_OP_VOP1__V_SCREEN_PARTITION_4SE_B32, &Decoder::decode_invalid, &Decoder::decode_OP_VOP1__V_CVT_F16_U16, &Decoder::decode_OP_VOP1__V_CVT_F16_I16, @@ -2944,10 +3136,10 @@ namespace VegaISA &Decoder::decode_OP_VOP1__V_COS_F16, &Decoder::decode_OP_VOP1__V_EXP_LEGACY_F32, &Decoder::decode_OP_VOP1__V_LOG_LEGACY_F32, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, - &Decoder::decode_invalid, + &Decoder::decode_OP_VOP1__V_CVT_NORM_I16_F16, + &Decoder::decode_OP_VOP1__V_CVT_NORM_U16_F16, + &Decoder::decode_OP_VOP1__V_SAT_PK_U8_I16, + &Decoder::decode_OP_VOP1__V_SWAP_B32, &Decoder::decode_invalid, &Decoder::decode_invalid, &Decoder::decode_invalid, @@ -3384,6 +3576,137 @@ namespace VegaISA &Decoder::decode_OP_VOPC__V_CMPX_T_U64, }; + IsaDecodeMethod Decoder::tableSubDecode_OP_VOP3P[] = { + &Decoder::decode_OP_VOP3P__V_PK_MAD_I16, + &Decoder::decode_OP_VOP3P__V_PK_MUL_LO_U16, + &Decoder::decode_OP_VOP3P__V_PK_ADD_I16, + &Decoder::decode_OP_VOP3P__V_PK_SUB_I16, + &Decoder::decode_OP_VOP3P__V_PK_LSHLREV_B16, + &Decoder::decode_OP_VOP3P__V_PK_LSHRREV_B16, + &Decoder::decode_OP_VOP3P__V_PK_ASHRREV_I16, + &Decoder::decode_OP_VOP3P__V_PK_MAX_I16, + &Decoder::decode_OP_VOP3P__V_PK_MIN_I16, + &Decoder::decode_OP_VOP3P__V_PK_MAD_U16, + &Decoder::decode_OP_VOP3P__V_PK_ADD_U16, + &Decoder::decode_OP_VOP3P__V_PK_SUB_U16, + &Decoder::decode_OP_VOP3P__V_PK_MAX_U16, + &Decoder::decode_OP_VOP3P__V_PK_MIN_U16, + &Decoder::decode_OP_VOP3P__V_PK_FMA_F16, + &Decoder::decode_OP_VOP3P__V_PK_ADD_F16, + &Decoder::decode_OP_VOP3P__V_PK_MUL_F16, + &Decoder::decode_OP_VOP3P__V_PK_MIN_F16, + &Decoder::decode_OP_VOP3P__V_PK_MAX_F16, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_OP_VOP3P__V_MAD_MIX_F32, + &Decoder::decode_OP_VOP3P__V_MAD_MIXLO_F16, + &Decoder::decode_OP_VOP3P__V_MAD_MIXHI_F16, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + &Decoder::decode_invalid, + }; + GPUStaticInst* Decoder::decode(MachInst mach_inst) { @@ -3400,6 +3723,14 @@ namespace VegaISA return (this->*method)(iFmt); } // subDecode_OP_VOPC + GPUStaticInst* + Decoder::subDecode_OP_VOP3P(MachInst iFmt) + { + InFmt_VOP3P *enc = &iFmt->iFmt_VOP3P; + IsaDecodeMethod method = tableSubDecode_OP_VOP3P[enc->OP]; + return (this->*method)(iFmt); + } // subDecode_OP_VOP3P + GPUStaticInst* Decoder::subDecode_OP_VOP1(MachInst iFmt) { @@ -3660,40 +3991,40 @@ namespace VegaISA } // decode_OP_VOP2__V_MADAK_F32 GPUStaticInst* - Decoder::decode_OP_VOP2__V_ADD_U32(MachInst iFmt) + Decoder::decode_OP_VOP2__V_ADD_CO_U32(MachInst iFmt) { return new Inst_VOP2__V_ADD_U32(&iFmt->iFmt_VOP2); - } // decode_OP_VOP2__V_ADD_U32 + } // decode_OP_VOP2__V_ADD_CO_U32 GPUStaticInst* - Decoder::decode_OP_VOP2__V_SUB_U32(MachInst iFmt) + Decoder::decode_OP_VOP2__V_SUB_CO_U32(MachInst iFmt) { return new Inst_VOP2__V_SUB_U32(&iFmt->iFmt_VOP2); - } // decode_OP_VOP2__V_SUB_U32 + } // decode_OP_VOP2__V_SUB_CO_U32 GPUStaticInst* - Decoder::decode_OP_VOP2__V_SUBREV_U32(MachInst iFmt) + Decoder::decode_OP_VOP2__V_SUBREV_CO_U32(MachInst iFmt) { return new Inst_VOP2__V_SUBREV_U32(&iFmt->iFmt_VOP2); - } // decode_OP_VOP2__V_SUBREV_U32 + } // decode_OP_VOP2__V_SUBREV_CO_U32 GPUStaticInst* - Decoder::decode_OP_VOP2__V_ADDC_U32(MachInst iFmt) + Decoder::decode_OP_VOP2__V_ADDC_CO_U32(MachInst iFmt) { return new Inst_VOP2__V_ADDC_U32(&iFmt->iFmt_VOP2); - } // decode_OP_VOP2__V_ADDC_U32 + } // decode_OP_VOP2__V_ADDC_CO_U32 GPUStaticInst* - Decoder::decode_OP_VOP2__V_SUBB_U32(MachInst iFmt) + Decoder::decode_OP_VOP2__V_SUBB_CO_U32(MachInst iFmt) { return new Inst_VOP2__V_SUBB_U32(&iFmt->iFmt_VOP2); - } // decode_OP_VOP2__V_SUBB_U32 + } // decode_OP_VOP2__V_SUBB_CO_U32 GPUStaticInst* - Decoder::decode_OP_VOP2__V_SUBBREV_U32(MachInst iFmt) + Decoder::decode_OP_VOP2__V_SUBBREV_CO_U32(MachInst iFmt) { return new Inst_VOP2__V_SUBBREV_U32(&iFmt->iFmt_VOP2); - } // decode_OP_VOP2__V_SUBBREV_U32 + } // decode_OP_VOP2__V_SUBBREV_CO_U32 GPUStaticInst* Decoder::decode_OP_VOP2__V_ADD_F16(MachInst iFmt) @@ -3821,6 +4152,24 @@ namespace VegaISA return new Inst_VOP2__V_LDEXP_F16(&iFmt->iFmt_VOP2); } // decode_OP_VOP2__V_LDEXP_F16 + GPUStaticInst* + Decoder::decode_OP_VOP2__V_ADD_U32(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP2__V_SUB_U32(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP2__V_SUBREV_U32(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OP_SOP2__S_ADD_U32(MachInst iFmt) { @@ -4085,6 +4434,60 @@ namespace VegaISA return new Inst_SOP2__S_RFE_RESTORE_B64(&iFmt->iFmt_SOP2); } // decode_OP_SOP2__S_RFE_RESTORE_B64 + GPUStaticInst* + Decoder::decode_OP_SOP2__S_MUL_HI_U32(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SOP2__S_MUL_HI_I32(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SOP2__S_LSHL1_ADD_U32(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SOP2__S_LSHL2_ADD_U32(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SOP2__S_LSHL3_ADD_U32(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SOP2__S_LSHL4_ADD_U32(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SOP2__S_PACK_LL_B32_B16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SOP2__S_PACK_LH_B32_B16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SOP2__S_HH_B32_B16(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OP_SOPK__S_MOVK_I32(MachInst iFmt) { @@ -4205,6 +4608,12 @@ namespace VegaISA return new Inst_SOPK__S_SETREG_IMM32_B32(&iFmt->iFmt_SOPK); } // decode_OP_SOPK__S_SETREG_IMM32_B32 + GPUStaticInst* + Decoder::decode_OP_SOPK__S_CALL_B64(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OP_EXP(MachInst iFmt) { @@ -6378,22 +6787,22 @@ namespace VegaISA } // decode_OPU_VOP3__V_MAD_I64_I32 GPUStaticInst* - Decoder::decode_OPU_VOP3__V_MAD_F16(MachInst iFmt) + Decoder::decode_OPU_VOP3__V_MAD_LEGACY_F16(MachInst iFmt) { return new Inst_VOP3__V_MAD_F16(&iFmt->iFmt_VOP3A); - } // decode_OPU_VOP3__V_MAD_F16 + } // decode_OPU_VOP3__V_MAD_LEGACY_F16 GPUStaticInst* - Decoder::decode_OPU_VOP3__V_MAD_U16(MachInst iFmt) + Decoder::decode_OPU_VOP3__V_MAD_LEGACY_U16(MachInst iFmt) { return new Inst_VOP3__V_MAD_U16(&iFmt->iFmt_VOP3A); - } // decode_OPU_VOP3__V_MAD_U16 + } // decode_OPU_VOP3__V_MAD_LEGACY_U16 GPUStaticInst* - Decoder::decode_OPU_VOP3__V_MAD_I16(MachInst iFmt) + Decoder::decode_OPU_VOP3__V_MAD_LEGACY_I16(MachInst iFmt) { return new Inst_VOP3__V_MAD_I16(&iFmt->iFmt_VOP3A); - } // decode_OPU_VOP3__V_MAD_I16 + } // decode_OPU_VOP3__V_MAD_LEGACY_I16 GPUStaticInst* Decoder::decode_OPU_VOP3__V_PERM_B32(MachInst iFmt) @@ -6402,16 +6811,16 @@ namespace VegaISA } // decode_OPU_VOP3__V_PERM_B32 GPUStaticInst* - Decoder::decode_OPU_VOP3__V_FMA_F16(MachInst iFmt) + Decoder::decode_OPU_VOP3__V_FMA_LEGACY_F16(MachInst iFmt) { return new Inst_VOP3__V_FMA_F16(&iFmt->iFmt_VOP3A); - } // decode_OPU_VOP3__V_FMA_F16 + } // decode_OPU_VOP3__V_FMA_LEGACY_F16 GPUStaticInst* - Decoder::decode_OPU_VOP3__V_DIV_FIXUP_F16(MachInst iFmt) + Decoder::decode_OPU_VOP3__V_DIV_FIXUP_LEGACY_F16(MachInst iFmt) { return new Inst_VOP3__V_DIV_FIXUP_F16(&iFmt->iFmt_VOP3A); - } // decode_OPU_VOP3__V_DIV_FIXUP_F16 + } // decode_OPU_VOP3__V_DIV_FIXUP_LEGACY_F16 GPUStaticInst* Decoder::decode_OPU_VOP3__V_CVT_PKACCUM_U8_F32(MachInst iFmt) @@ -6419,6 +6828,144 @@ namespace VegaISA return new Inst_VOP3__V_CVT_PKACCUM_U8_F32(&iFmt->iFmt_VOP3A); } // decode_OPU_VOP3__V_CVT_PKACCUM_U8_F32 + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_MAD_U32_U16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_MAD_I32_I16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_XAD_U32(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_MIN3_F16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_MIN3_I16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_MIN3_U16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_MAX3_F16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_MAX3_I16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_MAX3_U16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_MED3_F16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_MED3_I16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_MED3_U16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_LSHL_ADD_U32(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_ADD_LSHL_U32(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_ADD3_U32(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_LSHL_OR_B32(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_AND_OR_B32(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_OR3_B32(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_MAD_F16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_MAD_U16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_MAD_I16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_FMA_F16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_DIV_FIXUP_F16(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OPU_VOP3__V_INTERP_P1_F32(MachInst iFmt) { @@ -6449,6 +6996,12 @@ namespace VegaISA return new Inst_VOP3__V_INTERP_P1LV_F16(&iFmt->iFmt_VOP3A); } // decode_OPU_VOP3__V_INTERP_P1LV_F16 + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_INTERP_P2_LEGACY_F16(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OPU_VOP3__V_INTERP_P2_F16(MachInst iFmt) { @@ -6599,6 +7152,48 @@ namespace VegaISA return new Inst_VOP3__V_CVT_PK_I16_I32(&iFmt->iFmt_VOP3A); } // decode_OPU_VOP3__V_CVT_PK_I16_I32 + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_PKNORM_I16_F16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_PKNORM_U16_F16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_ADD_I32(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_SUB_I32(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_ADD_I16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_SUB_I16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OPU_VOP3__V_PACK_B32_F16(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OP_DS__DS_ADD_U32(MachInst iFmt) { @@ -6731,6 +7326,12 @@ namespace VegaISA return new Inst_DS__DS_ADD_F32(&iFmt->iFmt_DS); } // decode_OP_DS__DS_ADD_F32 + GPUStaticInst* + Decoder::decode_OP_DS__DS_WRITE_ADDTID_B32(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OP_DS__DS_WRITE_B8(MachInst iFmt) { @@ -7055,6 +7656,54 @@ namespace VegaISA return new Inst_DS__DS_MAX_F64(&iFmt->iFmt_DS); } // decode_OP_DS__DS_MAX_F64 + GPUStaticInst* + Decoder::decode_OP_DS__DS_WRITE_B8_D16_HI(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_DS__DS_WRITE_B16_D16_HI(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_DS__DS_READ_U8_D16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_DS__DS_READ_U8_D16_HI(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_DS__DS_READ_I8_D16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_DS__DS_READ_I8_D16_HI(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_DS__DS_READ_U16_D16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_DS__DS_READ_U16_D16_HI(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OP_DS__DS_ADD_RTN_U64(MachInst iFmt) { @@ -7331,6 +7980,12 @@ namespace VegaISA return new Inst_DS__DS_GWS_BARRIER(&iFmt->iFmt_DS); } // decode_OP_DS__DS_GWS_BARRIER + GPUStaticInst* + Decoder::decode_OP_DS__DS_READ_ADDTID_B32(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OP_DS__DS_CONSUME(MachInst iFmt) { @@ -7752,289 +8407,289 @@ namespace VegaISA } // decode_OP_FLAT__FLAT_ATOMIC_DEC_X2 GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_UBYTE(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_UBYTE(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_SBYTE(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_SBYTE(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_USHORT(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_USHORT(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_SSHORT(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_SSHORT(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_DWORD(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_DWORD(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_DWORDX2(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_DWORDX2(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_DWORDX3(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_DWORDX3(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_DWORDX4(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_DWORDX4(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_STORE_BYTE(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_STORE_BYTE(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_STORE_BYTE_D16_HI(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_STORE_BYTE_D16_HI(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_STORE_SHORT(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_STORE_SHORT(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_STORE_SHORT_D16_HI(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_STORE_SHORT_D16_HI(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_STORE_DWORD(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_STORE_DWORD(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_STORE_DWORDX2(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_STORE_DWORDX2(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_STORE_DWORDX3(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_STORE_DWORDX3(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_STORE_DWORDX4(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_STORE_DWORDX4(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_UBYTE_D16(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_UBYTE_D16(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_UBYTE_D16_HI(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_UBYTE_D16_HI(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_SBYTE_D16(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_SBYTE_D16(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_SBYTE_D16_HI(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_SBYTE_D16_HI(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_SHORT_D16(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_SHORT_D16(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_SHORT_D16_HI(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_LOAD_SHORT_D16_HI(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_SWAP(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_SWAP(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_CMPSWAP(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_CMPSWAP(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_ADD(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_ADD(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_SUB(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_SUB(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_SMIN(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_SMIN(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_UMIN(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_UMIN(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_SMAX(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_SMAX(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_UMAX(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_UMAX(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_AND(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_AND(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_OR(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_OR(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_XOR(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_XOR(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_INC(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_INC(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_DEC(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_DEC(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_SWAP_X2(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_SWAP_X2(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_CMPSWAP_X2(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_CMPSWAP_X2(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_ADD_X2(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_ADD_X2(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_SUB_X2(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_SUB_X2(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_SMIN_X2(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_SMIN_X2(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_UMIN_X2(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_UMIN_X2(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_SMAX_X2(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_SMAX_X2(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_UMAX_X2(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_UMAX_X2(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_AND_X2(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_AND_X2(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_OR_X2(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_OR_X2(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_XOR_X2(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_XOR_X2(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_INC_X2(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_INC_X2(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_DEC_X2(MachInst) + Decoder::decode_OP_GLOBAL__GLOBAL_ATOMIC_DEC_X2(MachInst iFmt) { return nullptr; } @@ -8387,6 +9042,12 @@ namespace VegaISA return new Inst_MIMG__IMAGE_GATHER4_CL(&iFmt->iFmt_MIMG); } // decode_OP_MIMG__IMAGE_GATHER4_CL + GPUStaticInst* + Decoder::decode_OP_MIMG__IMAGE_GATHER4H(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OP_MIMG__IMAGE_GATHER4_L(MachInst iFmt) { @@ -8423,6 +9084,18 @@ namespace VegaISA return new Inst_MIMG__IMAGE_GATHER4_C_CL(&iFmt->iFmt_MIMG); } // decode_OP_MIMG__IMAGE_GATHER4_C_CL + GPUStaticInst* + Decoder::decode_OP_MIMG__IMAGE_GATHER4H_PCK(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_MIMG__IMAGE_GATHER8H_PCK(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OP_MIMG__IMAGE_GATHER4_C_L(MachInst iFmt) { @@ -8820,12 +9493,24 @@ namespace VegaISA return new Inst_MUBUF__BUFFER_STORE_BYTE(&iFmt->iFmt_MUBUF); } // decode_OP_MUBUF__BUFFER_STORE_BYTE + GPUStaticInst* + Decoder::decode_OP_MUBUF__BUFFER_STORE_BYTE_D16_HI(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OP_MUBUF__BUFFER_STORE_SHORT(MachInst iFmt) { return new Inst_MUBUF__BUFFER_STORE_SHORT(&iFmt->iFmt_MUBUF); } // decode_OP_MUBUF__BUFFER_STORE_SHORT + GPUStaticInst* + Decoder::decode_OP_MUBUF__BUFFER_STORE_SHORT_D16_HI(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OP_MUBUF__BUFFER_STORE_DWORD(MachInst iFmt) { @@ -9025,133 +9710,133 @@ namespace VegaISA } // decode_OP_MUBUF__BUFFER_ATOMIC_DEC_X2 GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_UBYTE(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_UBYTE(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_SBYTE(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_SBYTE(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_USHORT(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_USHORT(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_SSHORT(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_SSHORT(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_DWORD(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_DWORD(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_DWORDX2(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_DWORDX2(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_DWORDX3(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_DWORDX3(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_DWORDX4(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_DWORDX4(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_STORE_BYTE(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_STORE_BYTE(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_STORE_BYTE_D16_HI(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_STORE_BYTE_D16_HI(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_STORE_SHORT(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_STORE_SHORT(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_STORE_SHORT_D16_HI(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_STORE_SHORT_D16_HI(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_STORE_DWORD(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_STORE_DWORD(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_STORE_DWORDX2(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_STORE_DWORDX2(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_STORE_DWORDX3(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_STORE_DWORDX3(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_STORE_DWORDX4(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_STORE_DWORDX4(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_UBYTE_D16(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_UBYTE_D16(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_UBYTE_D16_HI(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_UBYTE_D16_HI(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_SBYTE_D16(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_SBYTE_D16(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_SBYTE_D16_HI(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_SBYTE_D16_HI(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_SHORT_D16(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_SHORT_D16(MachInst iFmt) { return nullptr; } GPUStaticInst* - Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_SHORT_D16_HI(MachInst) + Decoder::decode_OP_SCRATCH__SCRATCH_LOAD_SHORT_D16_HI(MachInst iFmt) { return nullptr; } @@ -9186,6 +9871,24 @@ namespace VegaISA return new Inst_SMEM__S_LOAD_DWORDX16(&iFmt->iFmt_SMEM); } // decode_OP_SMEM__S_LOAD_DWORDX16 + GPUStaticInst* + Decoder::decode_OP_SMEM__S_SCRATCH_LOAD_DWORD(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_SCRATCH_LOAD_DWORDX2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_SCRATCH_LOAD_DWORDX4(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OP_SMEM__S_BUFFER_LOAD_DWORD(MachInst iFmt) { @@ -9234,6 +9937,24 @@ namespace VegaISA return new Inst_SMEM__S_STORE_DWORDX4(&iFmt->iFmt_SMEM); } // decode_OP_SMEM__S_STORE_DWORDX4 + GPUStaticInst* + Decoder::decode_OP_SMEM__S_SCRATCH_STORE_DWORD(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_SCRATCH_STORE_DWORDX2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_SCRATCH_STORE_DWORDX4(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OP_SMEM__S_BUFFER_STORE_DWORD(MachInst iFmt) { @@ -9252,6 +9973,47 @@ namespace VegaISA return new Inst_SMEM__S_BUFFER_STORE_DWORDX4(&iFmt->iFmt_SMEM); } // decode_OP_SMEM__S_BUFFER_STORE_DWORDX4 + GPUStaticInst* + Decoder::decode_OP_MUBUF__BUFFER_LOAD_UBYTE_D16(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* + Decoder::decode_OP_MUBUF__BUFFER_LOAD_UBYTE_D16_HI(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* + Decoder::decode_OP_MUBUF__BUFFER_LOAD_SBYTE_D16(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* + Decoder::decode_OP_MUBUF__BUFFER_LOAD_SBYTE_D16_HI(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* + Decoder::decode_OP_MUBUF__BUFFER_LOAD_SHORT_D16(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* + Decoder::decode_OP_MUBUF__BUFFER_LOAD_SHORT_D16_HI(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* + Decoder::decode_OP_MUBUF__BUFFER_LOAD_FORMAT_D16_HI_X(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* + Decoder::decode_OP_MUBUF__BUFFER_STORE_FORMAT_D16_HI_X(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OP_SMEM__S_DCACHE_INV(MachInst iFmt) { @@ -9300,6 +10062,330 @@ namespace VegaISA return new Inst_SMEM__S_ATC_PROBE_BUFFER(&iFmt->iFmt_SMEM); } // decode_OP_SMEM__S_ATC_PROBE_BUFFER + GPUStaticInst* + Decoder::decode_OP_SMEM__S_DCACHE_DISCARD(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_DCACHE_DISCARD_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_SWAP(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_CMPSWAP(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_ADD(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_SUB(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_SMIN(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_UMIN(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_SMAX(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_UMAX(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_AND(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_OR(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_XOR(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_INC(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_DEC(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_SWAP_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_CMPSWAP_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_ADD_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_SUB_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_SMIN_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_UMIN_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_SMAX_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_UMAX_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_AND_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_OR_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_XOR_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_INC_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_BUFFER_ATOMIC_DEC_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_SWAP(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_CMPSWAP(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_ADD(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_SUB(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_SMIN(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_UMIN(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_SMAX(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_UMAX(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_AND(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_OR(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_XOR(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_INC(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_DEC(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_SWAP_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_CMPSWAP_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_ADD_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_SUB_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_SMIN_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_UMIN_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_SMAX_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_UMAX_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_AND_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_OR_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_XOR_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_INC_X2(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SMEM__S_ATOMIC_DEC_X2(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OP_SOP1__S_MOV_B32(MachInst iFmt) { @@ -9588,18 +10674,42 @@ namespace VegaISA return new Inst_SOP1__S_ABS_I32(&iFmt->iFmt_SOP1); } // decode_OP_SOP1__S_ABS_I32 - GPUStaticInst* - Decoder::decode_OP_SOP1__S_MOV_FED_B32(MachInst iFmt) - { - return new Inst_SOP1__S_MOV_FED_B32(&iFmt->iFmt_SOP1); - } // decode_OP_SOP1__S_MOV_FED_B32 - GPUStaticInst* Decoder::decode_OP_SOP1__S_SET_GPR_IDX_IDX(MachInst iFmt) { return new Inst_SOP1__S_SET_GPR_IDX_IDX(&iFmt->iFmt_SOP1); } // decode_OP_SOP1__S_SET_GPR_IDX_IDX + GPUStaticInst* + Decoder::decode_OP_SOP1__S_ANDN1_SAVEEXEC_B64(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SOP1__S_ORN1_SAVEEXEC_B64(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SOP1__S_ANDN1_WREXEC_B64(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SOP1__S_ANDN2_WREXEC_B64(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_SOP1__S_BITREPLICATE_B64_B32(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OP_SOPC__S_CMP_EQ_I32(MachInst iFmt) { @@ -9900,6 +11010,12 @@ namespace VegaISA return new Inst_SOPP__S_SET_GPR_IDX_MODE(&iFmt->iFmt_SOPP); } // decode_OP_SOPP__S_SET_GPR_IDX_MODE + GPUStaticInst* + Decoder::decode_OP_SOPP__S_ENDPGM_ORDERED_PS_DONE(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OP_VINTRP__V_INTERP_P1_F32(MachInst iFmt) { @@ -9972,12 +11088,6 @@ namespace VegaISA return new Inst_VOP1__V_CVT_I32_F32(&iFmt->iFmt_VOP1); } // decode_OP_VOP1__V_CVT_I32_F32 - GPUStaticInst* - Decoder::decode_OP_VOP1__V_MOV_FED_B32(MachInst iFmt) - { - return new Inst_VOP1__V_MOV_FED_B32(&iFmt->iFmt_VOP1); - } // decode_OP_VOP1__V_MOV_FED_B32 - GPUStaticInst* Decoder::decode_OP_VOP1__V_CVT_F16_F32(MachInst iFmt) { @@ -10242,6 +11352,12 @@ namespace VegaISA return new Inst_VOP1__V_CLREXCP(&iFmt->iFmt_VOP1); } // decode_OP_VOP1__V_CLREXCP + GPUStaticInst* + Decoder::decode_OP_VOP1__V_SCREEN_PARTITION_4SE_B32(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OP_VOP1__V_CVT_F16_U16(MachInst iFmt) { @@ -10362,6 +11478,30 @@ namespace VegaISA return new Inst_VOP1__V_LOG_LEGACY_F32(&iFmt->iFmt_VOP1); } // decode_OP_VOP1__V_LOG_LEGACY_F32 + GPUStaticInst* + Decoder::decode_OP_VOP1__V_CVT_NORM_I16_F16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP1__V_CVT_NORM_U16_F16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP1__V_SAT_PK_U8_I16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP1__V_SWAP_B32(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_OP_VOPC__V_CMP_CLASS_F32(MachInst iFmt) { @@ -11550,6 +12690,138 @@ namespace VegaISA return new Inst_VOPC__V_CMPX_T_U64(&iFmt->iFmt_VOPC); } // decode_OP_VOPC__V_CMPX_T_U64 + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_PK_MAD_I16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_PK_MUL_LO_U16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_PK_ADD_I16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_PK_SUB_I16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_PK_LSHLREV_B16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_PK_LSHRREV_B16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_PK_ASHRREV_I16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_PK_MAX_I16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_PK_MIN_I16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_PK_MAD_U16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_PK_ADD_U16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_PK_SUB_U16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_PK_MAX_U16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_PK_MIN_U16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_PK_FMA_F16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_PK_ADD_F16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_PK_MUL_F16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_PK_MIN_F16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_PK_MAX_F16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_MAD_MIX_F32(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_MAD_MIXLO_F16(MachInst iFmt) + { + return nullptr; + } + + GPUStaticInst* + Decoder::decode_OP_VOP3P__V_MAD_MIXHI_F16(MachInst iFmt) + { + return nullptr; + } + GPUStaticInst* Decoder::decode_invalid(MachInst iFmt) { diff --git a/src/arch/amdgpu/vega/gpu_decoder.hh b/src/arch/amdgpu/vega/gpu_decoder.hh index a14d80324e..69954f8e6b 100644 --- a/src/arch/amdgpu/vega/gpu_decoder.hh +++ b/src/arch/amdgpu/vega/gpu_decoder.hh @@ -66,13 +66,14 @@ namespace VegaISA static IsaDecodeMethod tableSubDecode_OP_MTBUF[16]; static IsaDecodeMethod tableSubDecode_OP_MUBUF[128]; static IsaDecodeMethod tableSubDecode_OP_SCRATCH[128]; - static IsaDecodeMethod tableSubDecode_OP_SMEM[64]; + static IsaDecodeMethod tableSubDecode_OP_SMEM[256]; static IsaDecodeMethod tableSubDecode_OP_SOP1[256]; static IsaDecodeMethod tableSubDecode_OP_SOPC[128]; static IsaDecodeMethod tableSubDecode_OP_SOPP[128]; static IsaDecodeMethod tableSubDecode_OP_VINTRP[4]; static IsaDecodeMethod tableSubDecode_OP_VOP1[256]; static IsaDecodeMethod tableSubDecode_OP_VOPC[256]; + static IsaDecodeMethod tableSubDecode_OP_VOP3P[128]; GPUStaticInst* decode_OPU_VOP3__V_CMP_CLASS_F32(MachInst); GPUStaticInst* decode_OPU_VOP3__V_CMPX_CLASS_F32(MachInst); @@ -435,18 +436,42 @@ namespace VegaISA GPUStaticInst* decode_OPU_VOP3__V_MQSAD_U32_U8(MachInst); GPUStaticInst* decode_OPU_VOP3__V_MAD_U64_U32(MachInst); GPUStaticInst* decode_OPU_VOP3__V_MAD_I64_I32(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_MAD_LEGACY_F16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_MAD_LEGACY_U16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_MAD_LEGACY_I16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_PERM_B32(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_FMA_LEGACY_F16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_DIV_FIXUP_LEGACY_F16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_CVT_PKACCUM_U8_F32(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_MAD_U32_U16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_MAD_I32_I16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_XAD_U32(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_MIN3_F16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_MIN3_I16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_MIN3_U16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_MAX3_F16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_MAX3_I16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_MAX3_U16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_MED3_F16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_MED3_I16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_MED3_U16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_LSHL_ADD_U32(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_ADD_LSHL_U32(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_ADD3_U32(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_LSHL_OR_B32(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_AND_OR_B32(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_OR3_B32(MachInst); GPUStaticInst* decode_OPU_VOP3__V_MAD_F16(MachInst); GPUStaticInst* decode_OPU_VOP3__V_MAD_U16(MachInst); GPUStaticInst* decode_OPU_VOP3__V_MAD_I16(MachInst); - GPUStaticInst* decode_OPU_VOP3__V_PERM_B32(MachInst); GPUStaticInst* decode_OPU_VOP3__V_FMA_F16(MachInst); GPUStaticInst* decode_OPU_VOP3__V_DIV_FIXUP_F16(MachInst); - GPUStaticInst* decode_OPU_VOP3__V_CVT_PKACCUM_U8_F32(MachInst); GPUStaticInst* decode_OPU_VOP3__V_INTERP_P1_F32(MachInst); GPUStaticInst* decode_OPU_VOP3__V_INTERP_P2_F32(MachInst); GPUStaticInst* decode_OPU_VOP3__V_INTERP_MOV_F32(MachInst); GPUStaticInst* decode_OPU_VOP3__V_INTERP_P1LL_F16(MachInst); GPUStaticInst* decode_OPU_VOP3__V_INTERP_P1LV_F16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_INTERP_P2_LEGACY_F16(MachInst); GPUStaticInst* decode_OPU_VOP3__V_INTERP_P2_F16(MachInst); GPUStaticInst* decode_OPU_VOP3__V_ADD_F64(MachInst); GPUStaticInst* decode_OPU_VOP3__V_MUL_F64(MachInst); @@ -472,6 +497,13 @@ namespace VegaISA GPUStaticInst* decode_OPU_VOP3__V_CVT_PKRTZ_F16_F32(MachInst); GPUStaticInst* decode_OPU_VOP3__V_CVT_PK_U16_U32(MachInst); GPUStaticInst* decode_OPU_VOP3__V_CVT_PK_I16_I32(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_PKNORM_I16_F16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_PKNORM_U16_F16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_ADD_I32(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_SUB_I32(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_ADD_I16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_SUB_I16(MachInst); + GPUStaticInst* decode_OPU_VOP3__V_PACK_B32_F16(MachInst); GPUStaticInst* decode_OP_DS__DS_ADD_U32(MachInst); GPUStaticInst* decode_OP_DS__DS_SUB_U32(MachInst); GPUStaticInst* decode_OP_DS__DS_RSUB_U32(MachInst); @@ -494,6 +526,7 @@ namespace VegaISA GPUStaticInst* decode_OP_DS__DS_MAX_F32(MachInst); GPUStaticInst* decode_OP_DS__DS_NOP(MachInst); GPUStaticInst* decode_OP_DS__DS_ADD_F32(MachInst); + GPUStaticInst* decode_OP_DS__DS_WRITE_ADDTID_B32(MachInst); GPUStaticInst* decode_OP_DS__DS_WRITE_B8(MachInst); GPUStaticInst* decode_OP_DS__DS_WRITE_B16(MachInst); GPUStaticInst* decode_OP_DS__DS_ADD_RTN_U32(MachInst); @@ -548,6 +581,14 @@ namespace VegaISA GPUStaticInst* decode_OP_DS__DS_CMPST_F64(MachInst); GPUStaticInst* decode_OP_DS__DS_MIN_F64(MachInst); GPUStaticInst* decode_OP_DS__DS_MAX_F64(MachInst); + GPUStaticInst* decode_OP_DS__DS_WRITE_B8_D16_HI(MachInst); + GPUStaticInst* decode_OP_DS__DS_WRITE_B16_D16_HI(MachInst); + GPUStaticInst* decode_OP_DS__DS_READ_U8_D16(MachInst); + GPUStaticInst* decode_OP_DS__DS_READ_U8_D16_HI(MachInst); + GPUStaticInst* decode_OP_DS__DS_READ_I8_D16(MachInst); + GPUStaticInst* decode_OP_DS__DS_READ_I8_D16_HI(MachInst); + GPUStaticInst* decode_OP_DS__DS_READ_U16_D16(MachInst); + GPUStaticInst* decode_OP_DS__DS_READ_U16_D16_HI(MachInst); GPUStaticInst* decode_OP_DS__DS_ADD_RTN_U64(MachInst); GPUStaticInst* decode_OP_DS__DS_SUB_RTN_U64(MachInst); GPUStaticInst* decode_OP_DS__DS_RSUB_RTN_U64(MachInst); @@ -594,6 +635,7 @@ namespace VegaISA GPUStaticInst* decode_OP_DS__DS_GWS_SEMA_BR(MachInst); GPUStaticInst* decode_OP_DS__DS_GWS_SEMA_P(MachInst); GPUStaticInst* decode_OP_DS__DS_GWS_BARRIER(MachInst); + GPUStaticInst* decode_OP_DS__DS_READ_ADDTID_B32(MachInst); GPUStaticInst* decode_OP_DS__DS_CONSUME(MachInst); GPUStaticInst* decode_OP_DS__DS_APPEND(MachInst); GPUStaticInst* decode_OP_DS__DS_ORDERED_COUNT(MachInst); @@ -771,12 +813,15 @@ namespace VegaISA GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_LZ_O(MachInst); GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4(MachInst); GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_CL(MachInst); + GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4H(MachInst); GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_L(MachInst); GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_B(MachInst); GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_B_CL(MachInst); GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_LZ(MachInst); GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_C(MachInst); GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_C_CL(MachInst); + GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4H_PCK(MachInst); + GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER8H_PCK(MachInst); GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_C_L(MachInst); GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_C_B(MachInst); GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_C_B_CL(MachInst); @@ -844,11 +889,21 @@ namespace VegaISA GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_DWORDX3(MachInst); GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_DWORDX4(MachInst); GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_BYTE(MachInst); + GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_BYTE_D16_HI(MachInst); GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_SHORT(MachInst); + GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_SHORT_D16_HI(MachInst); GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_DWORD(MachInst); GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_DWORDX2(MachInst); GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_DWORDX3(MachInst); GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_DWORDX4(MachInst); + GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_UBYTE_D16(MachInst); + GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_UBYTE_D16_HI(MachInst); + GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_SBYTE_D16(MachInst); + GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_SBYTE_D16_HI(MachInst); + GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_SHORT_D16(MachInst); + GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_SHORT_D16_HI(MachInst); + GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_FORMAT_D16_HI_X(MachInst); + GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_FORMAT_D16_HI_X(MachInst); GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_LDS_DWORD(MachInst); GPUStaticInst* decode_OP_MUBUF__BUFFER_WBINVL1(MachInst); GPUStaticInst* decode_OP_MUBUF__BUFFER_WBINVL1_VOL(MachInst); @@ -905,6 +960,9 @@ namespace VegaISA GPUStaticInst* decode_OP_SMEM__S_LOAD_DWORDX4(MachInst); GPUStaticInst* decode_OP_SMEM__S_LOAD_DWORDX8(MachInst); GPUStaticInst* decode_OP_SMEM__S_LOAD_DWORDX16(MachInst); + GPUStaticInst* decode_OP_SMEM__S_SCRATCH_LOAD_DWORD(MachInst); + GPUStaticInst* decode_OP_SMEM__S_SCRATCH_LOAD_DWORDX2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_SCRATCH_LOAD_DWORDX4(MachInst); GPUStaticInst* decode_OP_SMEM__S_BUFFER_LOAD_DWORD(MachInst); GPUStaticInst* decode_OP_SMEM__S_BUFFER_LOAD_DWORDX2(MachInst); GPUStaticInst* decode_OP_SMEM__S_BUFFER_LOAD_DWORDX4(MachInst); @@ -913,6 +971,9 @@ namespace VegaISA GPUStaticInst* decode_OP_SMEM__S_STORE_DWORD(MachInst); GPUStaticInst* decode_OP_SMEM__S_STORE_DWORDX2(MachInst); GPUStaticInst* decode_OP_SMEM__S_STORE_DWORDX4(MachInst); + GPUStaticInst* decode_OP_SMEM__S_SCRATCH_STORE_DWORD(MachInst); + GPUStaticInst* decode_OP_SMEM__S_SCRATCH_STORE_DWORDX2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_SCRATCH_STORE_DWORDX4(MachInst); GPUStaticInst* decode_OP_SMEM__S_BUFFER_STORE_DWORD(MachInst); GPUStaticInst* decode_OP_SMEM__S_BUFFER_STORE_DWORDX2(MachInst); GPUStaticInst* decode_OP_SMEM__S_BUFFER_STORE_DWORDX4(MachInst); @@ -924,6 +985,60 @@ namespace VegaISA GPUStaticInst* decode_OP_SMEM__S_MEMREALTIME(MachInst); GPUStaticInst* decode_OP_SMEM__S_ATC_PROBE(MachInst); GPUStaticInst* decode_OP_SMEM__S_ATC_PROBE_BUFFER(MachInst); + GPUStaticInst* decode_OP_SMEM__S_DCACHE_DISCARD(MachInst); + GPUStaticInst* decode_OP_SMEM__S_DCACHE_DISCARD_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_SWAP(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_CMPSWAP(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_ADD(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_SUB(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_SMIN(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_UMIN(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_SMAX(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_UMAX(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_AND(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_OR(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_XOR(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_INC(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_DEC(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_SWAP_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_CMPSWAP_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_ADD_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_SUB_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_SMIN_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_UMIN_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_SMAX_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_UMAX_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_AND_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_OR_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_XOR_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_INC_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_BUFFER_ATOMIC_DEC_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_SWAP(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_CMPSWAP(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_ADD(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_SUB(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_SMIN(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_UMIN(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_SMAX(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_UMAX(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_AND(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_OR(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_XOR(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_INC(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_DEC(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_SWAP_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_CMPSWAP_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_ADD_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_SUB_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_SMIN_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_UMIN_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_SMAX_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_UMAX_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_AND_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_OR_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_XOR_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_INC_X2(MachInst); + GPUStaticInst* decode_OP_SMEM__S_ATOMIC_DEC_X2(MachInst); GPUStaticInst* decode_OP_SOP1__S_MOV_B32(MachInst); GPUStaticInst* decode_OP_SOP1__S_MOV_B64(MachInst); GPUStaticInst* decode_OP_SOP1__S_CMOV_B32(MachInst); @@ -972,8 +1087,12 @@ namespace VegaISA GPUStaticInst* decode_OP_SOP1__S_MOVRELD_B64(MachInst); GPUStaticInst* decode_OP_SOP1__S_CBRANCH_JOIN(MachInst); GPUStaticInst* decode_OP_SOP1__S_ABS_I32(MachInst); - GPUStaticInst* decode_OP_SOP1__S_MOV_FED_B32(MachInst); GPUStaticInst* decode_OP_SOP1__S_SET_GPR_IDX_IDX(MachInst); + GPUStaticInst* decode_OP_SOP1__S_ANDN1_SAVEEXEC_B64(MachInst); + GPUStaticInst* decode_OP_SOP1__S_ORN1_SAVEEXEC_B64(MachInst); + GPUStaticInst* decode_OP_SOP1__S_ANDN1_WREXEC_B64(MachInst); + GPUStaticInst* decode_OP_SOP1__S_ANDN2_WREXEC_B64(MachInst); + GPUStaticInst* decode_OP_SOP1__S_BITREPLICATE_B64_B32(MachInst); GPUStaticInst* decode_OP_SOP2__S_ADD_U32(MachInst); GPUStaticInst* decode_OP_SOP2__S_SUB_U32(MachInst); GPUStaticInst* decode_OP_SOP2__S_ADD_I32(MachInst); @@ -1018,6 +1137,15 @@ namespace VegaISA GPUStaticInst* decode_OP_SOP2__S_CBRANCH_G_FORK(MachInst); GPUStaticInst* decode_OP_SOP2__S_ABSDIFF_I32(MachInst); GPUStaticInst* decode_OP_SOP2__S_RFE_RESTORE_B64(MachInst); + GPUStaticInst* decode_OP_SOP2__S_MUL_HI_U32(MachInst); + GPUStaticInst* decode_OP_SOP2__S_MUL_HI_I32(MachInst); + GPUStaticInst* decode_OP_SOP2__S_LSHL1_ADD_U32(MachInst); + GPUStaticInst* decode_OP_SOP2__S_LSHL2_ADD_U32(MachInst); + GPUStaticInst* decode_OP_SOP2__S_LSHL3_ADD_U32(MachInst); + GPUStaticInst* decode_OP_SOP2__S_LSHL4_ADD_U32(MachInst); + GPUStaticInst* decode_OP_SOP2__S_PACK_LL_B32_B16(MachInst); + GPUStaticInst* decode_OP_SOP2__S_PACK_LH_B32_B16(MachInst); + GPUStaticInst* decode_OP_SOP2__S_HH_B32_B16(MachInst); GPUStaticInst* decode_OP_SOPC__S_CMP_EQ_I32(MachInst); GPUStaticInst* decode_OP_SOPC__S_CMP_LG_I32(MachInst); GPUStaticInst* decode_OP_SOPC__S_CMP_GT_I32(MachInst); @@ -1058,6 +1186,7 @@ namespace VegaISA GPUStaticInst* decode_OP_SOPK__S_GETREG_B32(MachInst); GPUStaticInst* decode_OP_SOPK__S_SETREG_B32(MachInst); GPUStaticInst* decode_OP_SOPK__S_SETREG_IMM32_B32(MachInst); + GPUStaticInst* decode_OP_SOPK__S_CALL_B64(MachInst); GPUStaticInst* decode_OP_SOPP__S_NOP(MachInst); GPUStaticInst* decode_OP_SOPP__S_ENDPGM(MachInst); GPUStaticInst* decode_OP_SOPP__S_BRANCH(MachInst); @@ -1088,6 +1217,7 @@ namespace VegaISA GPUStaticInst* decode_OP_SOPP__S_ENDPGM_SAVED(MachInst); GPUStaticInst* decode_OP_SOPP__S_SET_GPR_IDX_OFF(MachInst); GPUStaticInst* decode_OP_SOPP__S_SET_GPR_IDX_MODE(MachInst); + GPUStaticInst* decode_OP_SOPP__S_ENDPGM_ORDERED_PS_DONE(MachInst); GPUStaticInst* decode_OP_VINTRP__V_INTERP_P1_F32(MachInst); GPUStaticInst* decode_OP_VINTRP__V_INTERP_P2_F32(MachInst); GPUStaticInst* decode_OP_VINTRP__V_INTERP_MOV_F32(MachInst); @@ -1100,7 +1230,6 @@ namespace VegaISA GPUStaticInst* decode_OP_VOP1__V_CVT_F32_U32(MachInst); GPUStaticInst* decode_OP_VOP1__V_CVT_U32_F32(MachInst); GPUStaticInst* decode_OP_VOP1__V_CVT_I32_F32(MachInst); - GPUStaticInst* decode_OP_VOP1__V_MOV_FED_B32(MachInst); GPUStaticInst* decode_OP_VOP1__V_CVT_F16_F32(MachInst); GPUStaticInst* decode_OP_VOP1__V_CVT_F32_F16(MachInst); GPUStaticInst* decode_OP_VOP1__V_CVT_RPI_I32_F32(MachInst); @@ -1145,6 +1274,7 @@ namespace VegaISA GPUStaticInst* decode_OP_VOP1__V_FREXP_EXP_I32_F32(MachInst); GPUStaticInst* decode_OP_VOP1__V_FREXP_MANT_F32(MachInst); GPUStaticInst* decode_OP_VOP1__V_CLREXCP(MachInst); + GPUStaticInst* decode_OP_VOP1__V_SCREEN_PARTITION_4SE_B32(MachInst); GPUStaticInst* decode_OP_VOP1__V_CVT_F16_U16(MachInst); GPUStaticInst* decode_OP_VOP1__V_CVT_F16_I16(MachInst); GPUStaticInst* decode_OP_VOP1__V_CVT_U16_F16(MachInst); @@ -1165,6 +1295,10 @@ namespace VegaISA GPUStaticInst* decode_OP_VOP1__V_COS_F16(MachInst); GPUStaticInst* decode_OP_VOP1__V_EXP_LEGACY_F32(MachInst); GPUStaticInst* decode_OP_VOP1__V_LOG_LEGACY_F32(MachInst); + GPUStaticInst* decode_OP_VOP1__V_CVT_NORM_I16_F16(MachInst); + GPUStaticInst* decode_OP_VOP1__V_CVT_NORM_U16_F16(MachInst); + GPUStaticInst* decode_OP_VOP1__V_SAT_PK_U8_I16(MachInst); + GPUStaticInst* decode_OP_VOP1__V_SWAP_B32(MachInst); GPUStaticInst* decode_OP_VOP2__V_CNDMASK_B32(MachInst); GPUStaticInst* decode_OP_VOP2__V_ADD_F32(MachInst); GPUStaticInst* decode_OP_VOP2__V_SUB_F32(MachInst); @@ -1190,12 +1324,12 @@ namespace VegaISA GPUStaticInst* decode_OP_VOP2__V_MAC_F32(MachInst); GPUStaticInst* decode_OP_VOP2__V_MADMK_F32(MachInst); GPUStaticInst* decode_OP_VOP2__V_MADAK_F32(MachInst); - GPUStaticInst* decode_OP_VOP2__V_ADD_U32(MachInst); - GPUStaticInst* decode_OP_VOP2__V_SUB_U32(MachInst); - GPUStaticInst* decode_OP_VOP2__V_SUBREV_U32(MachInst); - GPUStaticInst* decode_OP_VOP2__V_ADDC_U32(MachInst); - GPUStaticInst* decode_OP_VOP2__V_SUBB_U32(MachInst); - GPUStaticInst* decode_OP_VOP2__V_SUBBREV_U32(MachInst); + GPUStaticInst* decode_OP_VOP2__V_ADD_CO_U32(MachInst); + GPUStaticInst* decode_OP_VOP2__V_SUB_CO_U32(MachInst); + GPUStaticInst* decode_OP_VOP2__V_SUBREV_CO_U32(MachInst); + GPUStaticInst* decode_OP_VOP2__V_ADDC_CO_U32(MachInst); + GPUStaticInst* decode_OP_VOP2__V_SUBB_CO_U32(MachInst); + GPUStaticInst* decode_OP_VOP2__V_SUBBREV_CO_U32(MachInst); GPUStaticInst* decode_OP_VOP2__V_ADD_F16(MachInst); GPUStaticInst* decode_OP_VOP2__V_SUB_F16(MachInst); GPUStaticInst* decode_OP_VOP2__V_SUBREV_F16(MachInst); @@ -1217,6 +1351,9 @@ namespace VegaISA GPUStaticInst* decode_OP_VOP2__V_MIN_U16(MachInst); GPUStaticInst* decode_OP_VOP2__V_MIN_I16(MachInst); GPUStaticInst* decode_OP_VOP2__V_LDEXP_F16(MachInst); + GPUStaticInst* decode_OP_VOP2__V_ADD_U32(MachInst); + GPUStaticInst* decode_OP_VOP2__V_SUB_U32(MachInst); + GPUStaticInst* decode_OP_VOP2__V_SUBREV_U32(MachInst); GPUStaticInst* decode_OP_VOPC__V_CMP_CLASS_F32(MachInst); GPUStaticInst* decode_OP_VOPC__V_CMPX_CLASS_F32(MachInst); GPUStaticInst* decode_OP_VOPC__V_CMP_CLASS_F64(MachInst); @@ -1415,6 +1552,28 @@ namespace VegaISA GPUStaticInst* decode_OP_VOPC__V_CMPX_NE_U64(MachInst); GPUStaticInst* decode_OP_VOPC__V_CMPX_GE_U64(MachInst); GPUStaticInst* decode_OP_VOPC__V_CMPX_T_U64(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_PK_MAD_I16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_PK_MUL_LO_U16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_PK_ADD_I16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_PK_SUB_I16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_PK_LSHLREV_B16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_PK_LSHRREV_B16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_PK_ASHRREV_I16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_PK_MAX_I16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_PK_MIN_I16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_PK_MAD_U16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_PK_ADD_U16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_PK_SUB_U16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_PK_MAX_U16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_PK_MIN_U16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_PK_FMA_F16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_PK_ADD_F16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_PK_MUL_F16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_PK_MIN_F16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_PK_MAX_F16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_MAD_MIX_F32(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_MAD_MIXLO_F16(MachInst); + GPUStaticInst* decode_OP_VOP3P__V_MAD_MIXHI_F16(MachInst); GPUStaticInst* subDecode_OPU_VOP3(MachInst); GPUStaticInst* subDecode_OP_DS(MachInst); GPUStaticInst* subDecode_OP_FLAT(MachInst); @@ -1428,6 +1587,7 @@ namespace VegaISA GPUStaticInst* subDecode_OP_VINTRP(MachInst); GPUStaticInst* subDecode_OP_VOP1(MachInst); GPUStaticInst* subDecode_OP_VOPC(MachInst); + GPUStaticInst* subDecode_OP_VOP3P(MachInst); GPUStaticInst* decode_invalid(MachInst); };