diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc index 6852aede22..d9649a6337 100644 --- a/src/arch/arm/utility.cc +++ b/src/arch/arm/utility.cc @@ -469,6 +469,22 @@ computeAddrTop(ThreadContext *tc, bool selbit, bool is_instr, int res = (tbi && (!tbid || !is_instr))? 55: 63; return res; } + +Addr +maskTaggedAddr(Addr addr, ThreadContext *tc, ExceptionLevel el, + int topbit) +{ + if (topbit == 63) { + return addr; + } else if (bits(addr,55) && (el <= EL1 || ELIsInHost(tc, el))) { + uint64_t mask = ((uint64_t)0x1 << topbit) -1; + addr = addr | ~mask; + } else { + addr = bits(addr, topbit, 0); + } + return addr; // Nothing to do if this is not a tagged address +} + Addr purifyTaggedAddr(Addr addr, ThreadContext *tc, ExceptionLevel el, TCR tcr, bool is_instr) @@ -476,15 +492,7 @@ purifyTaggedAddr(Addr addr, ThreadContext *tc, ExceptionLevel el, bool selbit = bits(addr, 55); int topbit = computeAddrTop(tc, selbit, is_instr, tcr, el); - if (topbit == 63) { - return addr; - } else if (selbit && (el == EL1 || el == EL0 || ELIsInHost(tc, el))) { - uint64_t mask = ((uint64_t)0x1 << topbit) -1; - addr = addr | ~mask; - } else { - addr = bits(addr, topbit, 0); - } - return addr; // Nothing to do if this is not a tagged address + return maskTaggedAddr(addr, tc, el, topbit); } Addr diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh index 00b0acf383..523061b706 100644 --- a/src/arch/arm/utility.hh +++ b/src/arch/arm/utility.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010, 2012-2013, 2016-2020 ARM Limited + * Copyright (c) 2010, 2012-2013, 2016-2020, 2022 Arm Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -207,6 +207,8 @@ Addr purifyTaggedAddr(Addr addr, ThreadContext *tc, ExceptionLevel el, TCR tcr, bool isInstr); Addr purifyTaggedAddr(Addr addr, ThreadContext *tc, ExceptionLevel el, bool isInstr); +Addr maskTaggedAddr(Addr addr, ThreadContext *tc, ExceptionLevel el, + int topbit); int computeAddrTop(ThreadContext *tc, bool selbit, bool isInstr, TCR tcr, ExceptionLevel el);