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dev: Let the pixel pump bypass the DMA FIFO in non-caching mode.

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When in non-caching mode, performance metrics are not meaningful, and
we're just interested in functional level behavior. Going through the
DMA FIFO in the HDLCD controller is very inefficient, and prevents
reading a batch of pixels from memory all in one go.

Change-Id: I3fb6d4d06730b5a94b5399f01aa02186baa5c9b3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38721
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2020-12-24 07:53:57 -08:00
parent 5a124c2d86
commit 9c7cc711bc
4 changed files with 71 additions and 12 deletions
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16
src/dev/pixelpump.cc
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@@ -37,6 +37,8 @@
#include "dev/pixelpump.hh"
#include "base/logging.hh"
const DisplayTimings DisplayTimings::vga(
640, 480,
48, 96, 16,
@@ -281,16 +283,12 @@ BasePixelPump::renderFrame()
void
BasePixelPump::renderLine()
{
const unsigned pos_y(posY());
const unsigned pos_y = posY();
const size_t _width = fb.width();
Pixel pixel(0, 0, 0);
for (_posX = 0; _posX < _timings.width; ++_posX) {
if (!nextPixel(pixel)) {
panic("Unexpected underrun in BasePixelPump (%u, %u)\n",
_posX, pos_y);
}
fb.pixel(_posX, pos_y) = pixel;
}
auto pixel_it = fb.pixels.begin() + _width * pos_y;
panic_if(nextLine(pixel_it, _width) != _width,
"Unexpected underrun in BasePixelPump (%u, %u)", _width, pos_y);
}