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base-stats,misc: Rename Stats namespace as statistics

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As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::Stats became ::statistics.

"statistics" was chosen over "stats" to avoid generating
conflicts with the already existing variables (there are
way too many "stats" in the codebase), which would make
this patch even more disturbing for the users.

Change-Id: If877b12d7dac356f86e3b3d941bf7558a4fd8719
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45421
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Daniel R. Carvalho
2021-05-06 20:00:51 -03:00
committed by Daniel Carvalho
parent fa505f1c23
commit 98ac080ec4
228 changed files with 3078 additions and 2970 deletions
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28
src/cpu/base.cc
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@@ -368,13 +368,13 @@ BaseCPU::probeInstCommit(const StaticInstPtr &inst, Addr pc)
}
BaseCPU::
BaseCPUStats::BaseCPUStats(Stats::Group *parent)
: Stats::Group(parent),
ADD_STAT(numCycles, Stats::units::Cycle::get(),
BaseCPUStats::BaseCPUStats(statistics::Group *parent)
: statistics::Group(parent),
ADD_STAT(numCycles, statistics::units::Cycle::get(),
"Number of cpu cycles simulated"),
ADD_STAT(numWorkItemsStarted, Stats::units::Count::get(),
ADD_STAT(numWorkItemsStarted, statistics::units::Count::get(),
"Number of work items this cpu started"),
ADD_STAT(numWorkItemsCompleted, Stats::units::Count::get(),
ADD_STAT(numWorkItemsCompleted, statistics::units::Count::get(),
"Number of work items this cpu completed")
{
}
@@ -390,7 +390,7 @@ BaseCPU::regStats()
globalStats.reset(new GlobalStats(Root::root()));
}
using namespace Stats;
using namespace statistics;
int size = threadContexts.size();
if (size > 1) {
@@ -726,17 +726,17 @@ BaseCPU::traceFunctionsInternal(Addr pc)
}
BaseCPU::GlobalStats::GlobalStats(::Stats::Group *parent)
: ::Stats::Group(parent),
ADD_STAT(simInsts, Stats::units::Count::get(),
BaseCPU::GlobalStats::GlobalStats(::statistics::Group *parent)
: ::statistics::Group(parent),
ADD_STAT(simInsts, statistics::units::Count::get(),
"Number of instructions simulated"),
ADD_STAT(simOps, Stats::units::Count::get(),
ADD_STAT(simOps, statistics::units::Count::get(),
"Number of ops (including micro ops) simulated"),
ADD_STAT(hostInstRate, Stats::units::Rate<
Stats::units::Count, Stats::units::Second>::get(),
ADD_STAT(hostInstRate, statistics::units::Rate<
statistics::units::Count, statistics::units::Second>::get(),
"Simulator instruction rate (inst/s)"),
ADD_STAT(hostOpRate, Stats::units::Rate<
Stats::units::Count, Stats::units::Second>::get(),
ADD_STAT(hostOpRate, statistics::units::Rate<
statistics::units::Count, statistics::units::Second>::get(),
"Simulator op (including micro ops) rate (op/s)")
{
simInsts

22
src/cpu/base.hh
View File

@@ -146,15 +146,15 @@ class BaseCPU : public ClockedObject
const unsigned int _cacheLineSize;
/** Global CPU statistics that are merged into the Root object. */
struct GlobalStats : public Stats::Group
struct GlobalStats : public statistics::Group
{
GlobalStats(::Stats::Group *parent);
GlobalStats(::statistics::Group *parent);
::Stats::Value simInsts;
::Stats::Value simOps;
::statistics::Value simInsts;
::statistics::Value simOps;
::Stats::Formula hostInstRate;
::Stats::Formula hostOpRate;
::statistics::Formula hostInstRate;
::statistics::Formula hostOpRate;
};
/**
@@ -587,13 +587,13 @@ class BaseCPU : public ClockedObject
}
public:
struct BaseCPUStats : public Stats::Group
struct BaseCPUStats : public statistics::Group
{
BaseCPUStats(Stats::Group *parent);
BaseCPUStats(statistics::Group *parent);
// Number of CPU cycles simulated
Stats::Scalar numCycles;
Stats::Scalar numWorkItemsStarted;
Stats::Scalar numWorkItemsCompleted;
statistics::Scalar numCycles;
statistics::Scalar numWorkItemsStarted;
statistics::Scalar numWorkItemsCompleted;
} baseStats;
private:

24
src/cpu/kvm/base.cc
View File

@@ -258,27 +258,27 @@ BaseKvmCPU::startupThread()
}
}
BaseKvmCPU::StatGroup::StatGroup(Stats::Group *parent)
: Stats::Group(parent),
ADD_STAT(committedInsts, Stats::units::Count::get(),
BaseKvmCPU::StatGroup::StatGroup(statistics::Group *parent)
: statistics::Group(parent),
ADD_STAT(committedInsts, statistics::units::Count::get(),
"Number of instructions committed"),
ADD_STAT(numVMExits, Stats::units::Count::get(),
ADD_STAT(numVMExits, statistics::units::Count::get(),
"total number of KVM exits"),
ADD_STAT(numVMHalfEntries, Stats::units::Count::get(),
ADD_STAT(numVMHalfEntries, statistics::units::Count::get(),
"number of KVM entries to finalize pending operations"),
ADD_STAT(numExitSignal, Stats::units::Count::get(),
ADD_STAT(numExitSignal, statistics::units::Count::get(),
"exits due to signal delivery"),
ADD_STAT(numMMIO, Stats::units::Count::get(),
ADD_STAT(numMMIO, statistics::units::Count::get(),
"number of VM exits due to memory mapped IO"),
ADD_STAT(numCoalescedMMIO, Stats::units::Count::get(),
ADD_STAT(numCoalescedMMIO, statistics::units::Count::get(),
"number of coalesced memory mapped IO requests"),
ADD_STAT(numIO, Stats::units::Count::get(),
ADD_STAT(numIO, statistics::units::Count::get(),
"number of VM exits due to legacy IO"),
ADD_STAT(numHalt, Stats::units::Count::get(),
ADD_STAT(numHalt, statistics::units::Count::get(),
"number of VM exits due to wait for interrupt instructions"),
ADD_STAT(numInterrupts, Stats::units::Count::get(),
ADD_STAT(numInterrupts, statistics::units::Count::get(),
"number of interrupts delivered"),
ADD_STAT(numHypercalls, Stats::units::Count::get(), "number of hypercalls")
ADD_STAT(numHypercalls, statistics::units::Count::get(), "number of hypercalls")
{
}

24
src/cpu/kvm/base.hh
View File

@@ -781,19 +781,19 @@ class BaseKvmCPU : public BaseCPU
public:
/* @{ */
struct StatGroup : public Stats::Group
struct StatGroup : public statistics::Group
{
StatGroup(Stats::Group *parent);
Stats::Scalar committedInsts;
Stats::Scalar numVMExits;
Stats::Scalar numVMHalfEntries;
Stats::Scalar numExitSignal;
Stats::Scalar numMMIO;
Stats::Scalar numCoalescedMMIO;
Stats::Scalar numIO;
Stats::Scalar numHalt;
Stats::Scalar numInterrupts;
Stats::Scalar numHypercalls;
StatGroup(statistics::Group *parent);
statistics::Scalar committedInsts;
statistics::Scalar numVMExits;
statistics::Scalar numVMHalfEntries;
statistics::Scalar numExitSignal;
statistics::Scalar numMMIO;
statistics::Scalar numCoalescedMMIO;
statistics::Scalar numIO;
statistics::Scalar numHalt;
statistics::Scalar numInterrupts;
statistics::Scalar numHypercalls;
} stats;
/* @} */

26
src/cpu/minor/fetch2.cc
View File

@@ -605,32 +605,32 @@ Fetch2::isDrained()
}
Fetch2::Fetch2Stats::Fetch2Stats(MinorCPU *cpu)
: Stats::Group(cpu, "fetch2"),
ADD_STAT(intInstructions, Stats::units::Count::get(),
: statistics::Group(cpu, "fetch2"),
ADD_STAT(intInstructions, statistics::units::Count::get(),
"Number of integer instructions successfully decoded"),
ADD_STAT(fpInstructions, Stats::units::Count::get(),
ADD_STAT(fpInstructions, statistics::units::Count::get(),
"Number of floating point instructions successfully decoded"),
ADD_STAT(vecInstructions, Stats::units::Count::get(),
ADD_STAT(vecInstructions, statistics::units::Count::get(),
"Number of SIMD instructions successfully decoded"),
ADD_STAT(loadInstructions, Stats::units::Count::get(),
ADD_STAT(loadInstructions, statistics::units::Count::get(),
"Number of memory load instructions successfully decoded"),
ADD_STAT(storeInstructions, Stats::units::Count::get(),
ADD_STAT(storeInstructions, statistics::units::Count::get(),
"Number of memory store instructions successfully decoded"),
ADD_STAT(amoInstructions, Stats::units::Count::get(),
ADD_STAT(amoInstructions, statistics::units::Count::get(),
"Number of memory atomic instructions successfully decoded")
{
intInstructions
.flags(Stats::total);
.flags(statistics::total);
fpInstructions
.flags(Stats::total);
.flags(statistics::total);
vecInstructions
.flags(Stats::total);
.flags(statistics::total);
loadInstructions
.flags(Stats::total);
.flags(statistics::total);
storeInstructions
.flags(Stats::total);
.flags(statistics::total);
amoInstructions
.flags(Stats::total);
.flags(statistics::total);
}
void

14
src/cpu/minor/fetch2.hh
View File

@@ -168,16 +168,16 @@ class Fetch2 : public Named
std::vector<Fetch2ThreadInfo> fetchInfo;
ThreadID threadPriority;
struct Fetch2Stats : public Stats::Group
struct Fetch2Stats : public statistics::Group
{
Fetch2Stats(MinorCPU *cpu);
/** Stats */
Stats::Scalar intInstructions;
Stats::Scalar fpInstructions;
Stats::Scalar vecInstructions;
Stats::Scalar loadInstructions;
Stats::Scalar storeInstructions;
Stats::Scalar amoInstructions;
statistics::Scalar intInstructions;
statistics::Scalar fpInstructions;
statistics::Scalar vecInstructions;
statistics::Scalar loadInstructions;
statistics::Scalar storeInstructions;
statistics::Scalar amoInstructions;
} stats;
protected:

24
src/cpu/minor/stats.cc
View File

@@ -42,26 +42,26 @@ namespace minor
{
MinorStats::MinorStats(BaseCPU *base_cpu)
: Stats::Group(base_cpu),
ADD_STAT(numInsts, Stats::units::Count::get(),
: statistics::Group(base_cpu),
ADD_STAT(numInsts, statistics::units::Count::get(),
"Number of instructions committed"),
ADD_STAT(numOps, Stats::units::Count::get(),
ADD_STAT(numOps, statistics::units::Count::get(),
"Number of ops (including micro ops) committed"),
ADD_STAT(numDiscardedOps, Stats::units::Count::get(),
ADD_STAT(numDiscardedOps, statistics::units::Count::get(),
"Number of ops (including micro ops) which were discarded before "
"commit"),
ADD_STAT(numFetchSuspends, Stats::units::Count::get(),
ADD_STAT(numFetchSuspends, statistics::units::Count::get(),
"Number of times Execute suspended instruction fetching"),
ADD_STAT(quiesceCycles, Stats::units::Cycle::get(),
ADD_STAT(quiesceCycles, statistics::units::Cycle::get(),
"Total number of cycles that CPU has spent quiesced or waiting "
"for an interrupt"),
ADD_STAT(cpi, Stats::units::Rate<
Stats::units::Cycle, Stats::units::Count>::get(),
ADD_STAT(cpi, statistics::units::Rate<
statistics::units::Cycle, statistics::units::Count>::get(),
"CPI: cycles per instruction"),
ADD_STAT(ipc, Stats::units::Rate<
Stats::units::Count, Stats::units::Cycle>::get(),
ADD_STAT(ipc, statistics::units::Rate<
statistics::units::Count, statistics::units::Cycle>::get(),
"IPC: instructions per cycle"),
ADD_STAT(committedInstType, Stats::units::Count::get(),
ADD_STAT(committedInstType, statistics::units::Count::get(),
"Class of committed instruction")
{
quiesceCycles.prereq(quiesceCycles);
@@ -74,7 +74,7 @@ MinorStats::MinorStats(BaseCPU *base_cpu)
committedInstType
.init(base_cpu->numThreads, enums::Num_OpClass)
.flags(Stats::total | Stats::pdf | Stats::dist);
.flags(statistics::total | statistics::pdf | statistics::dist);
committedInstType.ysubnames(enums::OpClassStrings);
}

18
src/cpu/minor/stats.hh
View File

@@ -53,31 +53,31 @@ namespace minor
{
/** Currently unused stats class. */
struct MinorStats : public Stats::Group
struct MinorStats : public statistics::Group
{
MinorStats(BaseCPU *parent);
/** Number of simulated instructions */
Stats::Scalar numInsts;
statistics::Scalar numInsts;
/** Number of simulated insts and microops */
Stats::Scalar numOps;
statistics::Scalar numOps;
/** Number of ops discarded before committing */
Stats::Scalar numDiscardedOps;
statistics::Scalar numDiscardedOps;
/** Number of times fetch was asked to suspend by Execute */
Stats::Scalar numFetchSuspends;
statistics::Scalar numFetchSuspends;
/** Number of cycles in quiescent state */
Stats::Scalar quiesceCycles;
statistics::Scalar quiesceCycles;
/** CPI/IPC for total cycle counts and macro insts */
Stats::Formula cpi;
Stats::Formula ipc;
statistics::Formula cpi;
statistics::Formula ipc;
/** Number of instructions by type (OpClass) */
Stats::Vector2d committedInstType;
statistics::Vector2d committedInstType;
};

40
src/cpu/o3/commit.cc
View File

@@ -144,43 +144,43 @@ Commit::regProbePoints()
}
Commit::CommitStats::CommitStats(CPU *cpu, Commit *commit)
: Stats::Group(cpu, "commit"),
ADD_STAT(commitSquashedInsts, Stats::units::Count::get(),
: statistics::Group(cpu, "commit"),
ADD_STAT(commitSquashedInsts, statistics::units::Count::get(),
"The number of squashed insts skipped by commit"),
ADD_STAT(commitNonSpecStalls, Stats::units::Count::get(),
ADD_STAT(commitNonSpecStalls, statistics::units::Count::get(),
"The number of times commit has been forced to stall to "
"communicate backwards"),
ADD_STAT(branchMispredicts, Stats::units::Count::get(),
ADD_STAT(branchMispredicts, statistics::units::Count::get(),
"The number of times a branch was mispredicted"),
ADD_STAT(numCommittedDist, Stats::units::Count::get(),
ADD_STAT(numCommittedDist, statistics::units::Count::get(),
"Number of insts commited each cycle"),
ADD_STAT(instsCommitted, Stats::units::Count::get(),
ADD_STAT(instsCommitted, statistics::units::Count::get(),
"Number of instructions committed"),
ADD_STAT(opsCommitted, Stats::units::Count::get(),
ADD_STAT(opsCommitted, statistics::units::Count::get(),
"Number of ops (including micro ops) committed"),
ADD_STAT(memRefs, Stats::units::Count::get(),
ADD_STAT(memRefs, statistics::units::Count::get(),
"Number of memory references committed"),
ADD_STAT(loads, Stats::units::Count::get(), "Number of loads committed"),
ADD_STAT(amos, Stats::units::Count::get(),
ADD_STAT(loads, statistics::units::Count::get(), "Number of loads committed"),
ADD_STAT(amos, statistics::units::Count::get(),
"Number of atomic instructions committed"),
ADD_STAT(membars, Stats::units::Count::get(),
ADD_STAT(membars, statistics::units::Count::get(),
"Number of memory barriers committed"),
ADD_STAT(branches, Stats::units::Count::get(),
ADD_STAT(branches, statistics::units::Count::get(),
"Number of branches committed"),
ADD_STAT(vectorInstructions, Stats::units::Count::get(),
ADD_STAT(vectorInstructions, statistics::units::Count::get(),
"Number of committed Vector instructions."),
ADD_STAT(floating, Stats::units::Count::get(),
ADD_STAT(floating, statistics::units::Count::get(),
"Number of committed floating point instructions."),
ADD_STAT(integer, Stats::units::Count::get(),
ADD_STAT(integer, statistics::units::Count::get(),
"Number of committed integer instructions."),
ADD_STAT(functionCalls, Stats::units::Count::get(),
ADD_STAT(functionCalls, statistics::units::Count::get(),
"Number of function calls committed."),
ADD_STAT(committedInstType, Stats::units::Count::get(),
ADD_STAT(committedInstType, statistics::units::Count::get(),
"Class of committed instruction"),
ADD_STAT(commitEligibleSamples, Stats::units::Cycle::get(),
ADD_STAT(commitEligibleSamples, statistics::units::Cycle::get(),
"number cycles where commit BW limit reached")
{
using namespace Stats;
using namespace statistics;
commitSquashedInsts.prereq(commitSquashedInsts);
commitNonSpecStalls.prereq(commitNonSpecStalls);
@@ -188,7 +188,7 @@ Commit::CommitStats::CommitStats(CPU *cpu, Commit *commit)
numCommittedDist
.init(0,commit->commitWidth,1)
.flags(Stats::pdf);
.flags(statistics::pdf);
instsCommitted
.init(cpu->numThreads)

36
src/cpu/o3/commit.hh
View File

@@ -468,51 +468,51 @@ class Commit
int htmStarts[MaxThreads];
int htmStops[MaxThreads];
struct CommitStats : public Stats::Group
struct CommitStats : public statistics::Group
{
CommitStats(CPU *cpu, Commit *commit);
/** Stat for the total number of squashed instructions discarded by
* commit.
*/
Stats::Scalar commitSquashedInsts;
statistics::Scalar commitSquashedInsts;
/** Stat for the total number of times commit has had to stall due
* to a non-speculative instruction reaching the head of the ROB.
*/
Stats::Scalar commitNonSpecStalls;
statistics::Scalar commitNonSpecStalls;
/** Stat for the total number of branch mispredicts that caused a
* squash.
*/
Stats::Scalar branchMispredicts;
statistics::Scalar branchMispredicts;
/** Distribution of the number of committed instructions each cycle. */
Stats::Distribution numCommittedDist;
statistics::Distribution numCommittedDist;
/** Total number of instructions committed. */
Stats::Vector instsCommitted;
statistics::Vector instsCommitted;
/** Total number of ops (including micro ops) committed. */
Stats::Vector opsCommitted;
statistics::Vector opsCommitted;
/** Stat for the total number of committed memory references. */
Stats::Vector memRefs;
statistics::Vector memRefs;
/** Stat for the total number of committed loads. */
Stats::Vector loads;
statistics::Vector loads;
/** Stat for the total number of committed atomics. */
Stats::Vector amos;
statistics::Vector amos;
/** Total number of committed memory barriers. */
Stats::Vector membars;
statistics::Vector membars;
/** Total number of committed branches. */
Stats::Vector branches;
statistics::Vector branches;
/** Total number of vector instructions */
Stats::Vector vectorInstructions;
statistics::Vector vectorInstructions;
/** Total number of floating point instructions */
Stats::Vector floating;
statistics::Vector floating;
/** Total number of integer instructions */
Stats::Vector integer;
statistics::Vector integer;
/** Total number of function calls */
Stats::Vector functionCalls;
statistics::Vector functionCalls;
/** Committed instructions by instruction type (OpClass) */
Stats::Vector2d committedInstType;
statistics::Vector2d committedInstType;
/** Number of cycles where the commit bandwidth limit is reached. */
Stats::Scalar commitEligibleSamples;
statistics::Scalar commitEligibleSamples;
} stats;
};

56
src/cpu/o3/cpu.cc
View File

@@ -368,55 +368,55 @@ CPU::regProbePoints()
}
CPU::CPUStats::CPUStats(CPU *cpu)
: Stats::Group(cpu),
ADD_STAT(timesIdled, Stats::units::Count::get(),
: statistics::Group(cpu),
ADD_STAT(timesIdled, statistics::units::Count::get(),
"Number of times that the entire CPU went into an idle state "
"and unscheduled itself"),
ADD_STAT(idleCycles, Stats::units::Cycle::get(),
ADD_STAT(idleCycles, statistics::units::Cycle::get(),
"Total number of cycles that the CPU has spent unscheduled due "
"to idling"),
ADD_STAT(quiesceCycles, Stats::units::Cycle::get(),
ADD_STAT(quiesceCycles, statistics::units::Cycle::get(),
"Total number of cycles that CPU has spent quiesced or waiting "
"for an interrupt"),
ADD_STAT(committedInsts, Stats::units::Count::get(),
ADD_STAT(committedInsts, statistics::units::Count::get(),
"Number of Instructions Simulated"),
ADD_STAT(committedOps, Stats::units::Count::get(),
ADD_STAT(committedOps, statistics::units::Count::get(),
"Number of Ops (including micro ops) Simulated"),
ADD_STAT(cpi, Stats::units::Rate<
Stats::units::Cycle, Stats::units::Count>::get(),
ADD_STAT(cpi, statistics::units::Rate<
statistics::units::Cycle, statistics::units::Count>::get(),
"CPI: Cycles Per Instruction"),
ADD_STAT(totalCpi, Stats::units::Rate<
Stats::units::Cycle, Stats::units::Count>::get(),
ADD_STAT(totalCpi, statistics::units::Rate<
statistics::units::Cycle, statistics::units::Count>::get(),
"CPI: Total CPI of All Threads"),
ADD_STAT(ipc, Stats::units::Rate<
Stats::units::Count, Stats::units::Cycle>::get(),
ADD_STAT(ipc, statistics::units::Rate<
statistics::units::Count, statistics::units::Cycle>::get(),
"IPC: Instructions Per Cycle"),
ADD_STAT(totalIpc, Stats::units::Rate<
Stats::units::Count, Stats::units::Cycle>::get(),
ADD_STAT(totalIpc, statistics::units::Rate<
statistics::units::Count, statistics::units::Cycle>::get(),
"IPC: Total IPC of All Threads"),
ADD_STAT(intRegfileReads, Stats::units::Count::get(),
ADD_STAT(intRegfileReads, statistics::units::Count::get(),
"Number of integer regfile reads"),
ADD_STAT(intRegfileWrites, Stats::units::Count::get(),
ADD_STAT(intRegfileWrites, statistics::units::Count::get(),
"Number of integer regfile writes"),
ADD_STAT(fpRegfileReads, Stats::units::Count::get(),
ADD_STAT(fpRegfileReads, statistics::units::Count::get(),
"Number of floating regfile reads"),
ADD_STAT(fpRegfileWrites, Stats::units::Count::get(),
ADD_STAT(fpRegfileWrites, statistics::units::Count::get(),
"Number of floating regfile writes"),
ADD_STAT(vecRegfileReads, Stats::units::Count::get(),
ADD_STAT(vecRegfileReads, statistics::units::Count::get(),
"number of vector regfile reads"),
ADD_STAT(vecRegfileWrites, Stats::units::Count::get(),
ADD_STAT(vecRegfileWrites, statistics::units::Count::get(),
"number of vector regfile writes"),
ADD_STAT(vecPredRegfileReads, Stats::units::Count::get(),
ADD_STAT(vecPredRegfileReads, statistics::units::Count::get(),
"number of predicate regfile reads"),
ADD_STAT(vecPredRegfileWrites, Stats::units::Count::get(),
ADD_STAT(vecPredRegfileWrites, statistics::units::Count::get(),
"number of predicate regfile writes"),
ADD_STAT(ccRegfileReads, Stats::units::Count::get(),
ADD_STAT(ccRegfileReads, statistics::units::Count::get(),
"number of cc regfile reads"),
ADD_STAT(ccRegfileWrites, Stats::units::Count::get(),
ADD_STAT(ccRegfileWrites, statistics::units::Count::get(),
"number of cc regfile writes"),
ADD_STAT(miscRegfileReads, Stats::units::Count::get(),
ADD_STAT(miscRegfileReads, statistics::units::Count::get(),
"number of misc regfile reads"),
ADD_STAT(miscRegfileWrites, Stats::units::Count::get(),
ADD_STAT(miscRegfileWrites, statistics::units::Count::get(),
"number of misc regfile writes")
{
// Register any of the O3CPU's stats here.
@@ -435,11 +435,11 @@ CPU::CPUStats::CPUStats(CPU *cpu)
// MaxThreads so put in here instead
committedInsts
.init(cpu->numThreads)
.flags(Stats::total);
.flags(statistics::total);
committedOps
.init(cpu->numThreads)
.flags(Stats::total);
.flags(statistics::total);
cpi
.precision(6);

44
src/cpu/o3/cpu.hh
View File

@@ -657,49 +657,49 @@ class CPU : public BaseCPU
return iew.ldstQueue.getDataPort();
}
struct CPUStats : public Stats::Group
struct CPUStats : public statistics::Group
{
CPUStats(CPU *cpu);
/** Stat for total number of times the CPU is descheduled. */
Stats::Scalar timesIdled;
statistics::Scalar timesIdled;
/** Stat for total number of cycles the CPU spends descheduled. */
Stats::Scalar idleCycles;
statistics::Scalar idleCycles;
/** Stat for total number of cycles the CPU spends descheduled due to a
* quiesce operation or waiting for an interrupt. */
Stats::Scalar quiesceCycles;
statistics::Scalar quiesceCycles;
/** Stat for the number of committed instructions per thread. */
Stats::Vector committedInsts;
statistics::Vector committedInsts;
/** Stat for the number of committed ops (including micro ops) per
* thread. */
Stats::Vector committedOps;
statistics::Vector committedOps;
/** Stat for the CPI per thread. */
Stats::Formula cpi;
statistics::Formula cpi;
/** Stat for the total CPI. */
Stats::Formula totalCpi;
statistics::Formula totalCpi;
/** Stat for the IPC per thread. */
Stats::Formula ipc;
statistics::Formula ipc;
/** Stat for the total IPC. */
Stats::Formula totalIpc;
statistics::Formula totalIpc;
//number of integer register file accesses
Stats::Scalar intRegfileReads;
Stats::Scalar intRegfileWrites;
statistics::Scalar intRegfileReads;
statistics::Scalar intRegfileWrites;
//number of float register file accesses
Stats::Scalar fpRegfileReads;
Stats::Scalar fpRegfileWrites;
statistics::Scalar fpRegfileReads;
statistics::Scalar fpRegfileWrites;
//number of vector register file accesses
mutable Stats::Scalar vecRegfileReads;
Stats::Scalar vecRegfileWrites;
mutable statistics::Scalar vecRegfileReads;
statistics::Scalar vecRegfileWrites;
//number of predicate register file accesses
mutable Stats::Scalar vecPredRegfileReads;
Stats::Scalar vecPredRegfileWrites;
mutable statistics::Scalar vecPredRegfileReads;
statistics::Scalar vecPredRegfileWrites;
//number of CC register file accesses
Stats::Scalar ccRegfileReads;
Stats::Scalar ccRegfileWrites;
statistics::Scalar ccRegfileReads;
statistics::Scalar ccRegfileWrites;
//number of misc
Stats::Scalar miscRegfileReads;
Stats::Scalar miscRegfileWrites;
statistics::Scalar miscRegfileReads;
statistics::Scalar miscRegfileWrites;
} cpuStats;
public:

22
src/cpu/o3/decode.cc
View File

@@ -118,27 +118,27 @@ Decode::name() const
}
Decode::DecodeStats::DecodeStats(CPU *cpu)
: Stats::Group(cpu, "decode"),
ADD_STAT(idleCycles, Stats::units::Cycle::get(),
: statistics::Group(cpu, "decode"),
ADD_STAT(idleCycles, statistics::units::Cycle::get(),
"Number of cycles decode is idle"),
ADD_STAT(blockedCycles, Stats::units::Cycle::get(),
ADD_STAT(blockedCycles, statistics::units::Cycle::get(),
"Number of cycles decode is blocked"),
ADD_STAT(runCycles, Stats::units::Cycle::get(),
ADD_STAT(runCycles, statistics::units::Cycle::get(),
"Number of cycles decode is running"),
ADD_STAT(unblockCycles, Stats::units::Cycle::get(),
ADD_STAT(unblockCycles, statistics::units::Cycle::get(),
"Number of cycles decode is unblocking"),
ADD_STAT(squashCycles, Stats::units::Cycle::get(),
ADD_STAT(squashCycles, statistics::units::Cycle::get(),
"Number of cycles decode is squashing"),
ADD_STAT(branchResolved, Stats::units::Count::get(),
ADD_STAT(branchResolved, statistics::units::Count::get(),
"Number of times decode resolved a branch"),
ADD_STAT(branchMispred, Stats::units::Count::get(),
ADD_STAT(branchMispred, statistics::units::Count::get(),
"Number of times decode detected a branch misprediction"),
ADD_STAT(controlMispred, Stats::units::Count::get(),
ADD_STAT(controlMispred, statistics::units::Count::get(),
"Number of times decode detected an instruction incorrectly "
"predicted as a control"),
ADD_STAT(decodedInsts, Stats::units::Count::get(),
ADD_STAT(decodedInsts, statistics::units::Count::get(),
"Number of instructions handled by decode"),
ADD_STAT(squashedInsts, Stats::units::Count::get(),
ADD_STAT(squashedInsts, statistics::units::Count::get(),
"Number of squashed instructions handled by decode")
{
idleCycles.prereq(idleCycles);

22
src/cpu/o3/decode.hh
View File

@@ -291,32 +291,32 @@ class Decode
*/
bool squashAfterDelaySlot[MaxThreads];
struct DecodeStats : public Stats::Group
struct DecodeStats : public statistics::Group
{
DecodeStats(CPU *cpu);
/** Stat for total number of idle cycles. */
Stats::Scalar idleCycles;
statistics::Scalar idleCycles;
/** Stat for total number of blocked cycles. */
Stats::Scalar blockedCycles;
statistics::Scalar blockedCycles;
/** Stat for total number of normal running cycles. */
Stats::Scalar runCycles;
statistics::Scalar runCycles;
/** Stat for total number of unblocking cycles. */
Stats::Scalar unblockCycles;
statistics::Scalar unblockCycles;
/** Stat for total number of squashing cycles. */
Stats::Scalar squashCycles;
statistics::Scalar squashCycles;
/** Stat for number of times a branch is resolved at decode. */
Stats::Scalar branchResolved;
statistics::Scalar branchResolved;
/** Stat for number of times a branch mispredict is detected. */
Stats::Scalar branchMispred;
statistics::Scalar branchMispred;
/** Stat for number of times decode detected a non-control instruction
* incorrectly predicted as a branch.
*/
Stats::Scalar controlMispred;
statistics::Scalar controlMispred;
/** Stat for total number of decoded instructions. */
Stats::Scalar decodedInsts;
statistics::Scalar decodedInsts;
/** Stat for total number of squashed instructions. */
Stats::Scalar squashedInsts;
statistics::Scalar squashedInsts;
} stats;
};

54
src/cpu/o3/fetch.cc
View File

@@ -156,55 +156,55 @@ Fetch::regProbePoints()
}
Fetch::FetchStatGroup::FetchStatGroup(CPU *cpu, Fetch *fetch)
: Stats::Group(cpu, "fetch"),
ADD_STAT(icacheStallCycles, Stats::units::Cycle::get(),
: statistics::Group(cpu, "fetch"),
ADD_STAT(icacheStallCycles, statistics::units::Cycle::get(),
"Number of cycles fetch is stalled on an Icache miss"),
ADD_STAT(insts, Stats::units::Count::get(),
ADD_STAT(insts, statistics::units::Count::get(),
"Number of instructions fetch has processed"),
ADD_STAT(branches, Stats::units::Count::get(),
ADD_STAT(branches, statistics::units::Count::get(),
"Number of branches that fetch encountered"),
ADD_STAT(predictedBranches, Stats::units::Count::get(),
ADD_STAT(predictedBranches, statistics::units::Count::get(),
"Number of branches that fetch has predicted taken"),
ADD_STAT(cycles, Stats::units::Cycle::get(),
ADD_STAT(cycles, statistics::units::Cycle::get(),
"Number of cycles fetch has run and was not squashing or "
"blocked"),
ADD_STAT(squashCycles, Stats::units::Cycle::get(),
ADD_STAT(squashCycles, statistics::units::Cycle::get(),
"Number of cycles fetch has spent squashing"),
ADD_STAT(tlbCycles, Stats::units::Cycle::get(),
ADD_STAT(tlbCycles, statistics::units::Cycle::get(),
"Number of cycles fetch has spent waiting for tlb"),
ADD_STAT(idleCycles, Stats::units::Cycle::get(),
ADD_STAT(idleCycles, statistics::units::Cycle::get(),
"Number of cycles fetch was idle"),
ADD_STAT(blockedCycles, Stats::units::Cycle::get(),
ADD_STAT(blockedCycles, statistics::units::Cycle::get(),
"Number of cycles fetch has spent blocked"),
ADD_STAT(miscStallCycles, Stats::units::Cycle::get(),
ADD_STAT(miscStallCycles, statistics::units::Cycle::get(),
"Number of cycles fetch has spent waiting on interrupts, or bad "
"addresses, or out of MSHRs"),
ADD_STAT(pendingDrainCycles, Stats::units::Cycle::get(),
ADD_STAT(pendingDrainCycles, statistics::units::Cycle::get(),
"Number of cycles fetch has spent waiting on pipes to drain"),
ADD_STAT(noActiveThreadStallCycles, Stats::units::Cycle::get(),
ADD_STAT(noActiveThreadStallCycles, statistics::units::Cycle::get(),
"Number of stall cycles due to no active thread to fetch from"),
ADD_STAT(pendingTrapStallCycles, Stats::units::Cycle::get(),
ADD_STAT(pendingTrapStallCycles, statistics::units::Cycle::get(),
"Number of stall cycles due to pending traps"),
ADD_STAT(pendingQuiesceStallCycles, Stats::units::Cycle::get(),
ADD_STAT(pendingQuiesceStallCycles, statistics::units::Cycle::get(),
"Number of stall cycles due to pending quiesce instructions"),
ADD_STAT(icacheWaitRetryStallCycles, Stats::units::Cycle::get(),
ADD_STAT(icacheWaitRetryStallCycles, statistics::units::Cycle::get(),
"Number of stall cycles due to full MSHR"),
ADD_STAT(cacheLines, Stats::units::Count::get(),
ADD_STAT(cacheLines, statistics::units::Count::get(),
"Number of cache lines fetched"),
ADD_STAT(icacheSquashes, Stats::units::Count::get(),
ADD_STAT(icacheSquashes, statistics::units::Count::get(),
"Number of outstanding Icache misses that were squashed"),
ADD_STAT(tlbSquashes, Stats::units::Count::get(),
ADD_STAT(tlbSquashes, statistics::units::Count::get(),
"Number of outstanding ITLB misses that were squashed"),
ADD_STAT(nisnDist, Stats::units::Count::get(),
ADD_STAT(nisnDist, statistics::units::Count::get(),
"Number of instructions fetched each cycle (Total)"),
ADD_STAT(idleRate, Stats::units::Ratio::get(),
ADD_STAT(idleRate, statistics::units::Ratio::get(),
"Ratio of cycles fetch was idle",
idleCycles / cpu->baseStats.numCycles),
ADD_STAT(branchRate, Stats::units::Ratio::get(),
ADD_STAT(branchRate, statistics::units::Ratio::get(),
"Number of branch fetches per cycle",
branches / cpu->baseStats.numCycles),
ADD_STAT(rate, Stats::units::Rate<
Stats::units::Count, Stats::units::Cycle>::get(),
ADD_STAT(rate, statistics::units::Rate<
statistics::units::Count, statistics::units::Cycle>::get(),
"Number of inst fetches per cycle",
insts / cpu->baseStats.numCycles)
{
@@ -248,13 +248,13 @@ Fetch::FetchStatGroup::FetchStatGroup(CPU *cpu, Fetch *fetch)
.init(/* base value */ 0,
/* last value */ fetch->fetchWidth,
/* bucket size */ 1)
.flags(Stats::pdf);
.flags(statistics::pdf);
idleRate
.prereq(idleRate);
branchRate
.flags(Stats::total);
.flags(statistics::total);
rate
.flags(Stats::total);
.flags(statistics::total);
}
void
Fetch::setTimeBuffer(TimeBuffer<TimeStruct> *time_buffer)

46
src/cpu/o3/fetch.hh
View File

@@ -525,63 +525,63 @@ class Fetch
FinishTranslationEvent finishTranslationEvent;
protected:
struct FetchStatGroup : public Stats::Group
struct FetchStatGroup : public statistics::Group
{
FetchStatGroup(CPU *cpu, Fetch *fetch);
// @todo: Consider making these
// vectors and tracking on a per thread basis.
/** Stat for total number of cycles stalled due to an icache miss. */
Stats::Scalar icacheStallCycles;
statistics::Scalar icacheStallCycles;
/** Stat for total number of fetched instructions. */
Stats::Scalar insts;
statistics::Scalar insts;
/** Total number of fetched branches. */
Stats::Scalar branches;
statistics::Scalar branches;
/** Stat for total number of predicted branches. */
Stats::Scalar predictedBranches;
statistics::Scalar predictedBranches;
/** Stat for total number of cycles spent fetching. */
Stats::Scalar cycles;
statistics::Scalar cycles;
/** Stat for total number of cycles spent squashing. */
Stats::Scalar squashCycles;
statistics::Scalar squashCycles;
/** Stat for total number of cycles spent waiting for translation */
Stats::Scalar tlbCycles;
statistics::Scalar tlbCycles;
/** Stat for total number of cycles
* spent blocked due to other stages in
* the pipeline.
*/
Stats::Scalar idleCycles;
statistics::Scalar idleCycles;
/** Total number of cycles spent blocked. */
Stats::Scalar blockedCycles;
statistics::Scalar blockedCycles;
/** Total number of cycles spent in any other state. */
Stats::Scalar miscStallCycles;
statistics::Scalar miscStallCycles;
/** Total number of cycles spent in waiting for drains. */
Stats::Scalar pendingDrainCycles;
statistics::Scalar pendingDrainCycles;
/** Total number of stall cycles caused by no active threads to run. */
Stats::Scalar noActiveThreadStallCycles;
statistics::Scalar noActiveThreadStallCycles;
/** Total number of stall cycles caused by pending traps. */
Stats::Scalar pendingTrapStallCycles;
statistics::Scalar pendingTrapStallCycles;
/** Total number of stall cycles
* caused by pending quiesce instructions. */
Stats::Scalar pendingQuiesceStallCycles;
statistics::Scalar pendingQuiesceStallCycles;
/** Total number of stall cycles caused by I-cache wait retrys. */
Stats::Scalar icacheWaitRetryStallCycles;
statistics::Scalar icacheWaitRetryStallCycles;
/** Stat for total number of fetched cache lines. */
Stats::Scalar cacheLines;
statistics::Scalar cacheLines;
/** Total number of outstanding icache accesses that were dropped
* due to a squash.
*/
Stats::Scalar icacheSquashes;
statistics::Scalar icacheSquashes;
/** Total number of outstanding tlb accesses that were dropped
* due to a squash.
*/
Stats::Scalar tlbSquashes;
statistics::Scalar tlbSquashes;
/** Distribution of number of instructions fetched each cycle. */
Stats::Distribution nisnDist;
statistics::Distribution nisnDist;
/** Rate of how often fetch was idle. */
Stats::Formula idleRate;
statistics::Formula idleRate;
/** Number of branch fetches per cycle. */
Stats::Formula branchRate;
statistics::Formula branchRate;
/** Number of instruction fetched per cycle. */
Stats::Formula rate;
statistics::Formula rate;
} fetchStats;
};

96
src/cpu/o3/iew.cc
View File

@@ -140,127 +140,127 @@ IEW::regProbePoints()
}
IEW::IEWStats::IEWStats(CPU *cpu)
: Stats::Group(cpu),
ADD_STAT(idleCycles, Stats::units::Cycle::get(),
: statistics::Group(cpu),
ADD_STAT(idleCycles, statistics::units::Cycle::get(),
"Number of cycles IEW is idle"),
ADD_STAT(squashCycles, Stats::units::Cycle::get(),
ADD_STAT(squashCycles, statistics::units::Cycle::get(),
"Number of cycles IEW is squashing"),
ADD_STAT(blockCycles, Stats::units::Cycle::get(),
ADD_STAT(blockCycles, statistics::units::Cycle::get(),
"Number of cycles IEW is blocking"),
ADD_STAT(unblockCycles, Stats::units::Cycle::get(),
ADD_STAT(unblockCycles, statistics::units::Cycle::get(),
"Number of cycles IEW is unblocking"),
ADD_STAT(dispatchedInsts, Stats::units::Count::get(),
ADD_STAT(dispatchedInsts, statistics::units::Count::get(),
"Number of instructions dispatched to IQ"),
ADD_STAT(dispSquashedInsts, Stats::units::Count::get(),
ADD_STAT(dispSquashedInsts, statistics::units::Count::get(),
"Number of squashed instructions skipped by dispatch"),
ADD_STAT(dispLoadInsts, Stats::units::Count::get(),
ADD_STAT(dispLoadInsts, statistics::units::Count::get(),
"Number of dispatched load instructions"),
ADD_STAT(dispStoreInsts, Stats::units::Count::get(),
ADD_STAT(dispStoreInsts, statistics::units::Count::get(),
"Number of dispatched store instructions"),
ADD_STAT(dispNonSpecInsts, Stats::units::Count::get(),
ADD_STAT(dispNonSpecInsts, statistics::units::Count::get(),
"Number of dispatched non-speculative instructions"),
ADD_STAT(iqFullEvents, Stats::units::Count::get(),
ADD_STAT(iqFullEvents, statistics::units::Count::get(),
"Number of times the IQ has become full, causing a stall"),
ADD_STAT(lsqFullEvents, Stats::units::Count::get(),
ADD_STAT(lsqFullEvents, statistics::units::Count::get(),
"Number of times the LSQ has become full, causing a stall"),
ADD_STAT(memOrderViolationEvents, Stats::units::Count::get(),
ADD_STAT(memOrderViolationEvents, statistics::units::Count::get(),
"Number of memory order violations"),
ADD_STAT(predictedTakenIncorrect, Stats::units::Count::get(),
ADD_STAT(predictedTakenIncorrect, statistics::units::Count::get(),
"Number of branches that were predicted taken incorrectly"),
ADD_STAT(predictedNotTakenIncorrect, Stats::units::Count::get(),
ADD_STAT(predictedNotTakenIncorrect, statistics::units::Count::get(),
"Number of branches that were predicted not taken incorrectly"),
ADD_STAT(branchMispredicts, Stats::units::Count::get(),
ADD_STAT(branchMispredicts, statistics::units::Count::get(),
"Number of branch mispredicts detected at execute",
predictedTakenIncorrect + predictedNotTakenIncorrect),
executedInstStats(cpu),
ADD_STAT(instsToCommit, Stats::units::Count::get(),
ADD_STAT(instsToCommit, statistics::units::Count::get(),
"Cumulative count of insts sent to commit"),
ADD_STAT(writebackCount, Stats::units::Count::get(),
ADD_STAT(writebackCount, statistics::units::Count::get(),
"Cumulative count of insts written-back"),
ADD_STAT(producerInst, Stats::units::Count::get(),
ADD_STAT(producerInst, statistics::units::Count::get(),
"Number of instructions producing a value"),
ADD_STAT(consumerInst, Stats::units::Count::get(),
ADD_STAT(consumerInst, statistics::units::Count::get(),
"Number of instructions consuming a value"),
ADD_STAT(wbRate, Stats::units::Rate<
Stats::units::Count, Stats::units::Cycle>::get(),
ADD_STAT(wbRate, statistics::units::Rate<
statistics::units::Count, statistics::units::Cycle>::get(),
"Insts written-back per cycle"),
ADD_STAT(wbFanout, Stats::units::Rate<
Stats::units::Count, Stats::units::Count>::get(),
ADD_STAT(wbFanout, statistics::units::Rate<
statistics::units::Count, statistics::units::Count>::get(),
"Average fanout of values written-back")
{
instsToCommit
.init(cpu->numThreads)
.flags(Stats::total);
.flags(statistics::total);
writebackCount
.init(cpu->numThreads)
.flags(Stats::total);
.flags(statistics::total);
producerInst
.init(cpu->numThreads)
.flags(Stats::total);
.flags(statistics::total);
consumerInst
.init(cpu->numThreads)
.flags(Stats::total);
.flags(statistics::total);
wbRate
.flags(Stats::total);
.flags(statistics::total);
wbRate = writebackCount / cpu->baseStats.numCycles;
wbFanout
.flags(Stats::total);
.flags(statistics::total);
wbFanout = producerInst / consumerInst;
}
IEW::IEWStats::ExecutedInstStats::ExecutedInstStats(CPU *cpu)
: Stats::Group(cpu),
ADD_STAT(numInsts, Stats::units::Count::get(),
: statistics::Group(cpu),
ADD_STAT(numInsts, statistics::units::Count::get(),
"Number of executed instructions"),
ADD_STAT(numLoadInsts, Stats::units::Count::get(),
ADD_STAT(numLoadInsts, statistics::units::Count::get(),
"Number of load instructions executed"),
ADD_STAT(numSquashedInsts, Stats::units::Count::get(),
ADD_STAT(numSquashedInsts, statistics::units::Count::get(),
"Number of squashed instructions skipped in execute"),
ADD_STAT(numSwp, Stats::units::Count::get(),
ADD_STAT(numSwp, statistics::units::Count::get(),
"Number of swp insts executed"),
ADD_STAT(numNop, Stats::units::Count::get(),
ADD_STAT(numNop, statistics::units::Count::get(),
"Number of nop insts executed"),
ADD_STAT(numRefs, Stats::units::Count::get(),
ADD_STAT(numRefs, statistics::units::Count::get(),
"Number of memory reference insts executed"),
ADD_STAT(numBranches, Stats::units::Count::get(),
ADD_STAT(numBranches, statistics::units::Count::get(),
"Number of branches executed"),
ADD_STAT(numStoreInsts, Stats::units::Count::get(),
ADD_STAT(numStoreInsts, statistics::units::Count::get(),
"Number of stores executed"),
ADD_STAT(numRate, Stats::units::Rate<
Stats::units::Count, Stats::units::Cycle>::get(),
ADD_STAT(numRate, statistics::units::Rate<
statistics::units::Count, statistics::units::Cycle>::get(),
"Inst execution rate", numInsts / cpu->baseStats.numCycles)
{
numLoadInsts
.init(cpu->numThreads)
.flags(Stats::total);
.flags(statistics::total);
numSwp
.init(cpu->numThreads)
.flags(Stats::total);
.flags(statistics::total);
numNop
.init(cpu->numThreads)
.flags(Stats::total);
.flags(statistics::total);
numRefs
.init(cpu->numThreads)
.flags(Stats::total);
.flags(statistics::total);
numBranches
.init(cpu->numThreads)
.flags(Stats::total);
.flags(statistics::total);
numStoreInsts
.flags(Stats::total);
.flags(statistics::total);
numStoreInsts = numRefs - numLoadInsts;
numRate
.flags(Stats::total);
.flags(statistics::total);
}
void

66
src/cpu/o3/iew.hh
View File

@@ -417,79 +417,79 @@ class IEW
unsigned skidBufferMax;
struct IEWStats : public Stats::Group
struct IEWStats : public statistics::Group
{
IEWStats(CPU *cpu);
/** Stat for total number of idle cycles. */
Stats::Scalar idleCycles;
statistics::Scalar idleCycles;
/** Stat for total number of squashing cycles. */
Stats::Scalar squashCycles;
statistics::Scalar squashCycles;
/** Stat for total number of blocking cycles. */
Stats::Scalar blockCycles;
statistics::Scalar blockCycles;
/** Stat for total number of unblocking cycles. */
Stats::Scalar unblockCycles;
statistics::Scalar unblockCycles;
/** Stat for total number of instructions dispatched. */
Stats::Scalar dispatchedInsts;
statistics::Scalar dispatchedInsts;
/** Stat for total number of squashed instructions dispatch skips. */
Stats::Scalar dispSquashedInsts;
statistics::Scalar dispSquashedInsts;
/** Stat for total number of dispatched load instructions. */
Stats::Scalar dispLoadInsts;
statistics::Scalar dispLoadInsts;
/** Stat for total number of dispatched store instructions. */
Stats::Scalar dispStoreInsts;
/** Stat for total number of dispatched non speculative instructions. */
Stats::Scalar dispNonSpecInsts;
statistics::Scalar dispStoreInsts;
/** Stat for total number of dispatched non speculative insts. */
statistics::Scalar dispNonSpecInsts;
/** Stat for number of times the IQ becomes full. */
Stats::Scalar iqFullEvents;
statistics::Scalar iqFullEvents;
/** Stat for number of times the LSQ becomes full. */
Stats::Scalar lsqFullEvents;
statistics::Scalar lsqFullEvents;
/** Stat for total number of memory ordering violation events. */
Stats::Scalar memOrderViolationEvents;
statistics::Scalar memOrderViolationEvents;
/** Stat for total number of incorrect predicted taken branches. */
Stats::Scalar predictedTakenIncorrect;
statistics::Scalar predictedTakenIncorrect;
/** Stat for total number of incorrect predicted not taken branches. */
Stats::Scalar predictedNotTakenIncorrect;
statistics::Scalar predictedNotTakenIncorrect;
/** Stat for total number of mispredicted branches detected at
* execute. */
Stats::Formula branchMispredicts;
statistics::Formula branchMispredicts;
struct ExecutedInstStats : public Stats::Group
struct ExecutedInstStats : public statistics::Group
{
ExecutedInstStats(CPU *cpu);
/** Stat for total number of executed instructions. */
Stats::Scalar numInsts;
statistics::Scalar numInsts;
/** Stat for total number of executed load instructions. */
Stats::Vector numLoadInsts;
statistics::Vector numLoadInsts;
/** Stat for total number of squashed instructions skipped at
* execute. */
Stats::Scalar numSquashedInsts;
statistics::Scalar numSquashedInsts;
/** Number of executed software prefetches. */
Stats::Vector numSwp;
statistics::Vector numSwp;
/** Number of executed nops. */
Stats::Vector numNop;
statistics::Vector numNop;
/** Number of executed meomory references. */
Stats::Vector numRefs;
statistics::Vector numRefs;
/** Number of executed branches. */
Stats::Vector numBranches;
statistics::Vector numBranches;
/** Number of executed store instructions. */
Stats::Formula numStoreInsts;
statistics::Formula numStoreInsts;
/** Number of instructions executed per cycle. */
Stats::Formula numRate;
statistics::Formula numRate;
} executedInstStats;
/** Number of instructions sent to commit. */
Stats::Vector instsToCommit;
statistics::Vector instsToCommit;
/** Number of instructions that writeback. */
Stats::Vector writebackCount;
statistics::Vector writebackCount;
/** Number of instructions that wake consumers. */
Stats::Vector producerInst;
statistics::Vector producerInst;
/** Number of instructions that wake up from producers. */
Stats::Vector consumerInst;
statistics::Vector consumerInst;
/** Number of instructions per cycle written back. */
Stats::Formula wbRate;
statistics::Formula wbRate;
/** Average number of woken instructions per writeback. */
Stats::Formula wbFanout;
statistics::Formula wbFanout;
} iewStats;
};

84
src/cpu/o3/inst_queue.cc
View File

@@ -171,45 +171,45 @@ InstructionQueue::name() const
}
InstructionQueue::IQStats::IQStats(CPU *cpu, const unsigned &total_width)
: Stats::Group(cpu),
ADD_STAT(instsAdded, Stats::units::Count::get(),
: statistics::Group(cpu),
ADD_STAT(instsAdded, statistics::units::Count::get(),
"Number of instructions added to the IQ (excludes non-spec)"),
ADD_STAT(nonSpecInstsAdded, Stats::units::Count::get(),
ADD_STAT(nonSpecInstsAdded, statistics::units::Count::get(),
"Number of non-speculative instructions added to the IQ"),
ADD_STAT(instsIssued, Stats::units::Count::get(),
ADD_STAT(instsIssued, statistics::units::Count::get(),
"Number of instructions issued"),
ADD_STAT(intInstsIssued, Stats::units::Count::get(),
ADD_STAT(intInstsIssued, statistics::units::Count::get(),
"Number of integer instructions issued"),
ADD_STAT(floatInstsIssued, Stats::units::Count::get(),
ADD_STAT(floatInstsIssued, statistics::units::Count::get(),
"Number of float instructions issued"),
ADD_STAT(branchInstsIssued, Stats::units::Count::get(),
ADD_STAT(branchInstsIssued, statistics::units::Count::get(),
"Number of branch instructions issued"),
ADD_STAT(memInstsIssued, Stats::units::Count::get(),
ADD_STAT(memInstsIssued, statistics::units::Count::get(),
"Number of memory instructions issued"),
ADD_STAT(miscInstsIssued, Stats::units::Count::get(),
ADD_STAT(miscInstsIssued, statistics::units::Count::get(),
"Number of miscellaneous instructions issued"),
ADD_STAT(squashedInstsIssued, Stats::units::Count::get(),
ADD_STAT(squashedInstsIssued, statistics::units::Count::get(),
"Number of squashed instructions issued"),
ADD_STAT(squashedInstsExamined, Stats::units::Count::get(),
ADD_STAT(squashedInstsExamined, statistics::units::Count::get(),
"Number of squashed instructions iterated over during squash; "
"mainly for profiling"),
ADD_STAT(squashedOperandsExamined, Stats::units::Count::get(),
ADD_STAT(squashedOperandsExamined, statistics::units::Count::get(),
"Number of squashed operands that are examined and possibly "
"removed from graph"),
ADD_STAT(squashedNonSpecRemoved, Stats::units::Count::get(),
ADD_STAT(squashedNonSpecRemoved, statistics::units::Count::get(),
"Number of squashed non-spec instructions that were removed"),
ADD_STAT(numIssuedDist, Stats::units::Count::get(),
ADD_STAT(numIssuedDist, statistics::units::Count::get(),
"Number of insts issued each cycle"),
ADD_STAT(statFuBusy, Stats::units::Count::get(),
ADD_STAT(statFuBusy, statistics::units::Count::get(),
"attempts to use FU when none available"),
ADD_STAT(statIssuedInstType, Stats::units::Count::get(),
ADD_STAT(statIssuedInstType, statistics::units::Count::get(),
"Number of instructions issued per FU type, per thread"),
ADD_STAT(issueRate, Stats::units::Rate<
Stats::units::Count, Stats::units::Cycle>::get(),
ADD_STAT(issueRate, statistics::units::Rate<
statistics::units::Count, statistics::units::Cycle>::get(),
"Inst issue rate", instsIssued / cpu->baseStats.numCycles),
ADD_STAT(fuBusy, Stats::units::Count::get(), "FU busy when requested"),
ADD_STAT(fuBusyRate, Stats::units::Rate<
Stats::units::Count, Stats::units::Count>::get(),
ADD_STAT(fuBusy, statistics::units::Count::get(), "FU busy when requested"),
ADD_STAT(fuBusyRate, statistics::units::Rate<
statistics::units::Count, statistics::units::Count>::get(),
"FU busy rate (busy events/executed inst)")
{
instsAdded
@@ -260,7 +260,7 @@ InstructionQueue::IQStats::IQStats(CPU *cpu, const unsigned &total_width)
*/
numIssuedDist
.init(0,total_width,1)
.flags(Stats::pdf)
.flags(statistics::pdf)
;
/*
dist_unissued
@@ -275,7 +275,7 @@ InstructionQueue::IQStats::IQStats(CPU *cpu, const unsigned &total_width)
*/
statIssuedInstType
.init(cpu->numThreads,enums::Num_OpClass)
.flags(Stats::total | Stats::pdf | Stats::dist)
.flags(statistics::total | statistics::pdf | statistics::dist)
;
statIssuedInstType.ysubnames(enums::OpClassStrings);
@@ -296,12 +296,12 @@ InstructionQueue::IQStats::IQStats(CPU *cpu, const unsigned &total_width)
}
*/
issueRate
.flags(Stats::total)
.flags(statistics::total)
;
statFuBusy
.init(Num_OpClasses)
.flags(Stats::pdf | Stats::dist)
.flags(statistics::pdf | statistics::dist)
;
for (int i=0; i < Num_OpClasses; ++i) {
statFuBusy.subname(i, enums::OpClassStrings[i]);
@@ -309,43 +309,43 @@ InstructionQueue::IQStats::IQStats(CPU *cpu, const unsigned &total_width)
fuBusy
.init(cpu->numThreads)
.flags(Stats::total)
.flags(statistics::total)
;
fuBusyRate
.flags(Stats::total)
.flags(statistics::total)
;
fuBusyRate = fuBusy / instsIssued;
}
InstructionQueue::IQIOStats::IQIOStats(Stats::Group *parent)
: Stats::Group(parent),
ADD_STAT(intInstQueueReads, Stats::units::Count::get(),
InstructionQueue::IQIOStats::IQIOStats(statistics::Group *parent)
: statistics::Group(parent),
ADD_STAT(intInstQueueReads, statistics::units::Count::get(),
"Number of integer instruction queue reads"),
ADD_STAT(intInstQueueWrites, Stats::units::Count::get(),
ADD_STAT(intInstQueueWrites, statistics::units::Count::get(),
"Number of integer instruction queue writes"),
ADD_STAT(intInstQueueWakeupAccesses, Stats::units::Count::get(),
ADD_STAT(intInstQueueWakeupAccesses, statistics::units::Count::get(),
"Number of integer instruction queue wakeup accesses"),
ADD_STAT(fpInstQueueReads, Stats::units::Count::get(),
ADD_STAT(fpInstQueueReads, statistics::units::Count::get(),
"Number of floating instruction queue reads"),
ADD_STAT(fpInstQueueWrites, Stats::units::Count::get(),
ADD_STAT(fpInstQueueWrites, statistics::units::Count::get(),
"Number of floating instruction queue writes"),
ADD_STAT(fpInstQueueWakeupAccesses, Stats::units::Count::get(),
ADD_STAT(fpInstQueueWakeupAccesses, statistics::units::Count::get(),
"Number of floating instruction queue wakeup accesses"),
ADD_STAT(vecInstQueueReads, Stats::units::Count::get(),
ADD_STAT(vecInstQueueReads, statistics::units::Count::get(),
"Number of vector instruction queue reads"),
ADD_STAT(vecInstQueueWrites, Stats::units::Count::get(),
ADD_STAT(vecInstQueueWrites, statistics::units::Count::get(),
"Number of vector instruction queue writes"),
ADD_STAT(vecInstQueueWakeupAccesses, Stats::units::Count::get(),
ADD_STAT(vecInstQueueWakeupAccesses, statistics::units::Count::get(),
"Number of vector instruction queue wakeup accesses"),
ADD_STAT(intAluAccesses, Stats::units::Count::get(),
ADD_STAT(intAluAccesses, statistics::units::Count::get(),
"Number of integer alu accesses"),
ADD_STAT(fpAluAccesses, Stats::units::Count::get(),
ADD_STAT(fpAluAccesses, statistics::units::Count::get(),
"Number of floating point alu accesses"),
ADD_STAT(vecAluAccesses, Stats::units::Count::get(),
ADD_STAT(vecAluAccesses, statistics::units::Count::get(),
"Number of vector alu accesses")
{
using namespace Stats;
using namespace statistics;
intInstQueueReads
.flags(total);

72
src/cpu/o3/inst_queue.hh
View File

@@ -472,86 +472,86 @@ class InstructionQueue
*/
void dumpInsts();
struct IQStats : public Stats::Group
struct IQStats : public statistics::Group
{
IQStats(CPU *cpu, const unsigned &total_width);
/** Stat for number of instructions added. */
Stats::Scalar instsAdded;
statistics::Scalar instsAdded;
/** Stat for number of non-speculative instructions added. */
Stats::Scalar nonSpecInstsAdded;
statistics::Scalar nonSpecInstsAdded;
Stats::Scalar instsIssued;
statistics::Scalar instsIssued;
/** Stat for number of integer instructions issued. */
Stats::Scalar intInstsIssued;
statistics::Scalar intInstsIssued;
/** Stat for number of floating point instructions issued. */
Stats::Scalar floatInstsIssued;
statistics::Scalar floatInstsIssued;
/** Stat for number of branch instructions issued. */
Stats::Scalar branchInstsIssued;
statistics::Scalar branchInstsIssued;
/** Stat for number of memory instructions issued. */
Stats::Scalar memInstsIssued;
statistics::Scalar memInstsIssued;
/** Stat for number of miscellaneous instructions issued. */
Stats::Scalar miscInstsIssued;
statistics::Scalar miscInstsIssued;
/** Stat for number of squashed instructions that were ready to
* issue. */
Stats::Scalar squashedInstsIssued;
statistics::Scalar squashedInstsIssued;
/** Stat for number of squashed instructions examined when
* squashing. */
Stats::Scalar squashedInstsExamined;
statistics::Scalar squashedInstsExamined;
/** Stat for number of squashed instruction operands examined when
* squashing.
*/
Stats::Scalar squashedOperandsExamined;
statistics::Scalar squashedOperandsExamined;
/** Stat for number of non-speculative instructions removed due to
* a squash.
*/
Stats::Scalar squashedNonSpecRemoved;
statistics::Scalar squashedNonSpecRemoved;
// Also include number of instructions rescheduled and replayed.
/** Distribution of number of instructions in the queue.
* @todo: Need to create struct to track the entry time for each
* instruction. */
// Stats::VectorDistribution queueResDist;
// statistics::VectorDistribution queueResDist;
/** Distribution of the number of instructions issued. */
Stats::Distribution numIssuedDist;
statistics::Distribution numIssuedDist;
/** Distribution of the cycles it takes to issue an instruction.
* @todo: Need to create struct to track the ready time for each
* instruction. */
// Stats::VectorDistribution issueDelayDist;
// statistics::VectorDistribution issueDelayDist;
/** Number of times an instruction could not be issued because a
* FU was busy.
*/
Stats::Vector statFuBusy;
// Stats::Vector dist_unissued;
statistics::Vector statFuBusy;
// statistics::Vector dist_unissued;
/** Stat for total number issued for each instruction type. */
Stats::Vector2d statIssuedInstType;
statistics::Vector2d statIssuedInstType;
/** Number of instructions issued per cycle. */
Stats::Formula issueRate;
statistics::Formula issueRate;
/** Number of times the FU was busy. */
Stats::Vector fuBusy;
statistics::Vector fuBusy;
/** Number of times the FU was busy per instruction issued. */
Stats::Formula fuBusyRate;
statistics::Formula fuBusyRate;
} iqStats;
public:
struct IQIOStats : public Stats::Group
struct IQIOStats : public statistics::Group
{
IQIOStats(Stats::Group *parent);
Stats::Scalar intInstQueueReads;
Stats::Scalar intInstQueueWrites;
Stats::Scalar intInstQueueWakeupAccesses;
Stats::Scalar fpInstQueueReads;
Stats::Scalar fpInstQueueWrites;
Stats::Scalar fpInstQueueWakeupAccesses;
Stats::Scalar vecInstQueueReads;
Stats::Scalar vecInstQueueWrites;
Stats::Scalar vecInstQueueWakeupAccesses;
IQIOStats(statistics::Group *parent);
statistics::Scalar intInstQueueReads;
statistics::Scalar intInstQueueWrites;
statistics::Scalar intInstQueueWakeupAccesses;
statistics::Scalar fpInstQueueReads;
statistics::Scalar fpInstQueueWrites;
statistics::Scalar fpInstQueueWakeupAccesses;
statistics::Scalar vecInstQueueReads;
statistics::Scalar vecInstQueueWrites;
statistics::Scalar vecInstQueueWakeupAccesses;
Stats::Scalar intAluAccesses;
Stats::Scalar fpAluAccesses;
Stats::Scalar vecAluAccesses;
statistics::Scalar intAluAccesses;
statistics::Scalar fpAluAccesses;
statistics::Scalar vecAluAccesses;
} iqIOStats;
};

18
src/cpu/o3/lsq_unit.cc
View File

@@ -258,22 +258,22 @@ LSQUnit::name() const
}
}
LSQUnit::LSQUnitStats::LSQUnitStats(Stats::Group *parent)
: Stats::Group(parent),
ADD_STAT(forwLoads, Stats::units::Count::get(),
LSQUnit::LSQUnitStats::LSQUnitStats(statistics::Group *parent)
: statistics::Group(parent),
ADD_STAT(forwLoads, statistics::units::Count::get(),
"Number of loads that had data forwarded from stores"),
ADD_STAT(squashedLoads, Stats::units::Count::get(),
ADD_STAT(squashedLoads, statistics::units::Count::get(),
"Number of loads squashed"),
ADD_STAT(ignoredResponses, Stats::units::Count::get(),
ADD_STAT(ignoredResponses, statistics::units::Count::get(),
"Number of memory responses ignored because the instruction is "
"squashed"),
ADD_STAT(memOrderViolation, Stats::units::Count::get(),
ADD_STAT(memOrderViolation, statistics::units::Count::get(),
"Number of memory ordering violations"),
ADD_STAT(squashedStores, Stats::units::Count::get(),
ADD_STAT(squashedStores, statistics::units::Count::get(),
"Number of stores squashed"),
ADD_STAT(rescheduledLoads, Stats::units::Count::get(),
ADD_STAT(rescheduledLoads, statistics::units::Count::get(),
"Number of loads that were rescheduled"),
ADD_STAT(blockedByCache, Stats::units::Count::get(),
ADD_STAT(blockedByCache, statistics::units::Count::get(),
"Number of times an access to memory failed due to the cache "
"being blocked")
{

18
src/cpu/o3/lsq_unit.hh
View File

@@ -546,31 +546,31 @@ class LSQUnit
// Will also need how many read/write ports the Dcache has. Or keep track
// of that in stage that is one level up, and only call executeLoad/Store
// the appropriate number of times.
struct LSQUnitStats : public Stats::Group
struct LSQUnitStats : public statistics::Group
{
LSQUnitStats(Stats::Group *parent);
LSQUnitStats(statistics::Group *parent);
/** Total number of loads forwaded from LSQ stores. */
Stats::Scalar forwLoads;
statistics::Scalar forwLoads;
/** Total number of squashed loads. */
Stats::Scalar squashedLoads;
statistics::Scalar squashedLoads;
/** Total number of responses from the memory system that are
* ignored due to the instruction already being squashed. */
Stats::Scalar ignoredResponses;
statistics::Scalar ignoredResponses;
/** Tota number of memory ordering violations. */
Stats::Scalar memOrderViolation;
statistics::Scalar memOrderViolation;
/** Total number of squashed stores. */
Stats::Scalar squashedStores;
statistics::Scalar squashedStores;
/** Number of loads that were rescheduled. */
Stats::Scalar rescheduledLoads;
statistics::Scalar rescheduledLoads;
/** Number of times the LSQ is blocked due to the cache. */
Stats::Scalar blockedByCache;
statistics::Scalar blockedByCache;
} stats;
public:

12
src/cpu/o3/mem_dep_unit.cc
View File

@@ -100,15 +100,15 @@ MemDepUnit::init(const O3CPUParams &params, ThreadID tid, CPU *cpu)
cpu->addStatGroup(stats_group_name.c_str(), &stats);
}
MemDepUnit::MemDepUnitStats::MemDepUnitStats(Stats::Group *parent)
: Stats::Group(parent),
ADD_STAT(insertedLoads, Stats::units::Count::get(),
MemDepUnit::MemDepUnitStats::MemDepUnitStats(statistics::Group *parent)
: statistics::Group(parent),
ADD_STAT(insertedLoads, statistics::units::Count::get(),
"Number of loads inserted to the mem dependence unit."),
ADD_STAT(insertedStores, Stats::units::Count::get(),
ADD_STAT(insertedStores, statistics::units::Count::get(),
"Number of stores inserted to the mem dependence unit."),
ADD_STAT(conflictingLoads, Stats::units::Count::get(),
ADD_STAT(conflictingLoads, statistics::units::Count::get(),
"Number of conflicting loads."),
ADD_STAT(conflictingStores, Stats::units::Count::get(),
ADD_STAT(conflictingStores, statistics::units::Count::get(),
"Number of conflicting stores.")
{
}

12
src/cpu/o3/mem_dep_unit.hh
View File

@@ -260,19 +260,19 @@ class MemDepUnit
/** The thread id of this memory dependence unit. */
int id;
struct MemDepUnitStats : public Stats::Group
struct MemDepUnitStats : public statistics::Group
{
MemDepUnitStats(Stats::Group *parent);
MemDepUnitStats(statistics::Group *parent);
/** Stat for number of inserted loads. */
Stats::Scalar insertedLoads;
statistics::Scalar insertedLoads;
/** Stat for number of inserted stores. */
Stats::Scalar insertedStores;
statistics::Scalar insertedStores;
/** Stat for number of conflicting loads that had to wait for a
* store. */
Stats::Scalar conflictingLoads;
statistics::Scalar conflictingLoads;
/** Stat for number of conflicting stores that had to wait for a
* store. */
Stats::Scalar conflictingStores;
statistics::Scalar conflictingStores;
} stats;
};

22
src/cpu/o3/probe/elastic_trace.cc
View File

@@ -884,29 +884,29 @@ ElasticTrace::writeDepTrace(uint32_t num_to_write)
depTrace.erase(dep_trace_itr_start, dep_trace_itr);
}
ElasticTrace::ElasticTraceStats::ElasticTraceStats(Stats::Group *parent)
: Stats::Group(parent),
ADD_STAT(numRegDep, Stats::units::Count::get(),
ElasticTrace::ElasticTraceStats::ElasticTraceStats(statistics::Group *parent)
: statistics::Group(parent),
ADD_STAT(numRegDep, statistics::units::Count::get(),
"Number of register dependencies recorded during tracing"),
ADD_STAT(numOrderDepStores, Stats::units::Count::get(),
ADD_STAT(numOrderDepStores, statistics::units::Count::get(),
"Number of commit order (rob) dependencies for a store "
"recorded on a past load/store during tracing"),
ADD_STAT(numIssueOrderDepLoads, Stats::units::Count::get(),
ADD_STAT(numIssueOrderDepLoads, statistics::units::Count::get(),
"Number of loads that got assigned issue order dependency "
"because they were dependency-free"),
ADD_STAT(numIssueOrderDepStores, Stats::units::Count::get(),
ADD_STAT(numIssueOrderDepStores, statistics::units::Count::get(),
"Number of stores that got assigned issue order dependency "
"because they were dependency-free"),
ADD_STAT(numIssueOrderDepOther, Stats::units::Count::get(),
ADD_STAT(numIssueOrderDepOther, statistics::units::Count::get(),
"Number of non load/store insts that got assigned issue order "
"dependency because they were dependency-free"),
ADD_STAT(numFilteredNodes, Stats::units::Count::get(),
ADD_STAT(numFilteredNodes, statistics::units::Count::get(),
"No. of nodes filtered out before writing the output trace"),
ADD_STAT(maxNumDependents, Stats::units::Count::get(),
ADD_STAT(maxNumDependents, statistics::units::Count::get(),
"Maximum number or dependents on any instruction"),
ADD_STAT(maxTempStoreSize, Stats::units::Count::get(),
ADD_STAT(maxTempStoreSize, statistics::units::Count::get(),
"Maximum size of the temporary store during the run"),
ADD_STAT(maxPhysRegDepMapSize, Stats::units::Count::get(),
ADD_STAT(maxPhysRegDepMapSize, statistics::units::Count::get(),
"Maximum size of register dependency map")
{
}

22
src/cpu/o3/probe/elastic_trace.hh
View File

@@ -510,54 +510,54 @@ class ElasticTrace : public ProbeListenerObject
*/
bool hasCompCompleted(TraceInfo* past_record, Tick execute_tick) const;
struct ElasticTraceStats : public Stats::Group
struct ElasticTraceStats : public statistics::Group
{
ElasticTraceStats(Stats::Group *parent);
ElasticTraceStats(statistics::Group *parent);
/** Number of register dependencies recorded during tracing */
Stats::Scalar numRegDep;
statistics::Scalar numRegDep;
/**
* Number of stores that got assigned a commit order dependency
* on a past load/store.
*/
Stats::Scalar numOrderDepStores;
statistics::Scalar numOrderDepStores;
/**
* Number of load insts that got assigned an issue order dependency
* because they were dependency-free.
*/
Stats::Scalar numIssueOrderDepLoads;
statistics::Scalar numIssueOrderDepLoads;
/**
* Number of store insts that got assigned an issue order dependency
* because they were dependency-free.
*/
Stats::Scalar numIssueOrderDepStores;
statistics::Scalar numIssueOrderDepStores;
/**
* Number of non load/store insts that got assigned an issue order
* dependency because they were dependency-free.
*/
Stats::Scalar numIssueOrderDepOther;
statistics::Scalar numIssueOrderDepOther;
/** Number of filtered nodes */
Stats::Scalar numFilteredNodes;
statistics::Scalar numFilteredNodes;
/** Maximum number of dependents on any instruction */
Stats::Scalar maxNumDependents;
statistics::Scalar maxNumDependents;
/**
* Maximum size of the temporary store mostly useful as a check that
* it is not growing
*/
Stats::Scalar maxTempStoreSize;
statistics::Scalar maxTempStoreSize;
/**
* Maximum size of the map that holds the last writer to a physical
* register.
*/
Stats::Scalar maxPhysRegDepMapSize;
statistics::Scalar maxPhysRegDepMapSize;
} stats;
};

60
src/cpu/o3/rename.cc
View File

@@ -91,61 +91,61 @@ Rename::name() const
return cpu->name() + ".rename";
}
Rename::RenameStats::RenameStats(Stats::Group *parent)
: Stats::Group(parent, "rename"),
ADD_STAT(squashCycles, Stats::units::Cycle::get(),
Rename::RenameStats::RenameStats(statistics::Group *parent)
: statistics::Group(parent, "rename"),
ADD_STAT(squashCycles, statistics::units::Cycle::get(),
"Number of cycles rename is squashing"),
ADD_STAT(idleCycles, Stats::units::Cycle::get(),
ADD_STAT(idleCycles, statistics::units::Cycle::get(),
"Number of cycles rename is idle"),
ADD_STAT(blockCycles, Stats::units::Cycle::get(),
ADD_STAT(blockCycles, statistics::units::Cycle::get(),
"Number of cycles rename is blocking"),
ADD_STAT(serializeStallCycles, Stats::units::Cycle::get(),
ADD_STAT(serializeStallCycles, statistics::units::Cycle::get(),
"count of cycles rename stalled for serializing inst"),
ADD_STAT(runCycles, Stats::units::Cycle::get(),
ADD_STAT(runCycles, statistics::units::Cycle::get(),
"Number of cycles rename is running"),
ADD_STAT(unblockCycles, Stats::units::Cycle::get(),
ADD_STAT(unblockCycles, statistics::units::Cycle::get(),
"Number of cycles rename is unblocking"),
ADD_STAT(renamedInsts, Stats::units::Count::get(),
ADD_STAT(renamedInsts, statistics::units::Count::get(),
"Number of instructions processed by rename"),
ADD_STAT(squashedInsts, Stats::units::Count::get(),
ADD_STAT(squashedInsts, statistics::units::Count::get(),
"Number of squashed instructions processed by rename"),
ADD_STAT(ROBFullEvents, Stats::units::Count::get(),
ADD_STAT(ROBFullEvents, statistics::units::Count::get(),
"Number of times rename has blocked due to ROB full"),
ADD_STAT(IQFullEvents, Stats::units::Count::get(),
ADD_STAT(IQFullEvents, statistics::units::Count::get(),
"Number of times rename has blocked due to IQ full"),
ADD_STAT(LQFullEvents, Stats::units::Count::get(),
ADD_STAT(LQFullEvents, statistics::units::Count::get(),
"Number of times rename has blocked due to LQ full" ),
ADD_STAT(SQFullEvents, Stats::units::Count::get(),
ADD_STAT(SQFullEvents, statistics::units::Count::get(),
"Number of times rename has blocked due to SQ full"),
ADD_STAT(fullRegistersEvents, Stats::units::Count::get(),
ADD_STAT(fullRegistersEvents, statistics::units::Count::get(),
"Number of times there has been no free registers"),
ADD_STAT(renamedOperands, Stats::units::Count::get(),
ADD_STAT(renamedOperands, statistics::units::Count::get(),
"Number of destination operands rename has renamed"),
ADD_STAT(lookups, Stats::units::Count::get(),
ADD_STAT(lookups, statistics::units::Count::get(),
"Number of register rename lookups that rename has made"),
ADD_STAT(intLookups, Stats::units::Count::get(),
ADD_STAT(intLookups, statistics::units::Count::get(),
"Number of integer rename lookups"),
ADD_STAT(fpLookups, Stats::units::Count::get(),
ADD_STAT(fpLookups, statistics::units::Count::get(),
"Number of floating rename lookups"),
ADD_STAT(vecLookups, Stats::units::Count::get(),
ADD_STAT(vecLookups, statistics::units::Count::get(),
"Number of vector rename lookups"),
ADD_STAT(vecPredLookups, Stats::units::Count::get(),
ADD_STAT(vecPredLookups, statistics::units::Count::get(),
"Number of vector predicate rename lookups"),
ADD_STAT(committedMaps, Stats::units::Count::get(),
ADD_STAT(committedMaps, statistics::units::Count::get(),
"Number of HB maps that are committed"),
ADD_STAT(undoneMaps, Stats::units::Count::get(),
ADD_STAT(undoneMaps, statistics::units::Count::get(),
"Number of HB maps that are undone due to squashing"),
ADD_STAT(serializing, Stats::units::Count::get(),
ADD_STAT(serializing, statistics::units::Count::get(),
"count of serializing insts renamed"),
ADD_STAT(tempSerializing, Stats::units::Count::get(),
ADD_STAT(tempSerializing, statistics::units::Count::get(),
"count of temporary serializing insts renamed"),
ADD_STAT(skidInsts, Stats::units::Count::get(),
ADD_STAT(skidInsts, statistics::units::Count::get(),
"count of insts added to the skid buffer")
{
squashCycles.prereq(squashCycles);
idleCycles.prereq(idleCycles);
blockCycles.prereq(blockCycles);
serializeStallCycles.flags(Stats::total);
serializeStallCycles.flags(statistics::total);
runCycles.prereq(idleCycles);
unblockCycles.prereq(unblockCycles);
@@ -167,9 +167,9 @@ Rename::RenameStats::RenameStats(Stats::Group *parent)
committedMaps.prereq(committedMaps);
undoneMaps.prereq(undoneMaps);
serializing.flags(Stats::total);
tempSerializing.flags(Stats::total);
skidInsts.flags(Stats::total);
serializing.flags(statistics::total);
tempSerializing.flags(statistics::total);
skidInsts.flags(statistics::total);
}
void

52
src/cpu/o3/rename.hh
View File

@@ -473,62 +473,62 @@ class Rename
*/
void incrFullStat(const FullSource &source);
struct RenameStats : public Stats::Group
struct RenameStats : public statistics::Group
{
RenameStats(Stats::Group *parent);
RenameStats(statistics::Group *parent);
/** Stat for total number of cycles spent squashing. */
Stats::Scalar squashCycles;
statistics::Scalar squashCycles;
/** Stat for total number of cycles spent idle. */
Stats::Scalar idleCycles;
statistics::Scalar idleCycles;
/** Stat for total number of cycles spent blocking. */
Stats::Scalar blockCycles;
statistics::Scalar blockCycles;
/** Stat for total number of cycles spent stalling for a serializing
* inst. */
Stats::Scalar serializeStallCycles;
statistics::Scalar serializeStallCycles;
/** Stat for total number of cycles spent running normally. */
Stats::Scalar runCycles;
statistics::Scalar runCycles;
/** Stat for total number of cycles spent unblocking. */
Stats::Scalar unblockCycles;
statistics::Scalar unblockCycles;
/** Stat for total number of renamed instructions. */
Stats::Scalar renamedInsts;
statistics::Scalar renamedInsts;
/** Stat for total number of squashed instructions that rename
* discards. */
Stats::Scalar squashedInsts;
statistics::Scalar squashedInsts;
/** Stat for total number of times that the ROB starts a stall in
* rename. */
Stats::Scalar ROBFullEvents;
statistics::Scalar ROBFullEvents;
/** Stat for total number of times that the IQ starts a stall in
* rename. */
Stats::Scalar IQFullEvents;
statistics::Scalar IQFullEvents;
/** Stat for total number of times that the LQ starts a stall in
* rename. */
Stats::Scalar LQFullEvents;
statistics::Scalar LQFullEvents;
/** Stat for total number of times that the SQ starts a stall in
* rename. */
Stats::Scalar SQFullEvents;
statistics::Scalar SQFullEvents;
/** Stat for total number of times that rename runs out of free
* registers to use to rename. */
Stats::Scalar fullRegistersEvents;
statistics::Scalar fullRegistersEvents;
/** Stat for total number of renamed destination registers. */
Stats::Scalar renamedOperands;
statistics::Scalar renamedOperands;
/** Stat for total number of source register rename lookups. */
Stats::Scalar lookups;
Stats::Scalar intLookups;
Stats::Scalar fpLookups;
Stats::Scalar vecLookups;
Stats::Scalar vecPredLookups;
statistics::Scalar lookups;
statistics::Scalar intLookups;
statistics::Scalar fpLookups;
statistics::Scalar vecLookups;
statistics::Scalar vecPredLookups;
/** Stat for total number of committed renaming mappings. */
Stats::Scalar committedMaps;
statistics::Scalar committedMaps;
/** Stat for total number of mappings that were undone due to a
* squash. */
Stats::Scalar undoneMaps;
statistics::Scalar undoneMaps;
/** Number of serialize instructions handled. */
Stats::Scalar serializing;
statistics::Scalar serializing;
/** Number of instructions marked as temporarily serializing. */
Stats::Scalar tempSerializing;
statistics::Scalar tempSerializing;
/** Number of instructions inserted into skid buffers. */
Stats::Scalar skidInsts;
statistics::Scalar skidInsts;
} stats;
};

10
src/cpu/o3/rob.cc
View File

@@ -518,10 +518,12 @@ ROB::readTailInst(ThreadID tid)
return *tail_thread;
}
ROB::ROBStats::ROBStats(Stats::Group *parent)
: Stats::Group(parent, "rob"),
ADD_STAT(reads, Stats::units::Count::get(), "The number of ROB reads"),
ADD_STAT(writes, Stats::units::Count::get(), "The number of ROB writes")
ROB::ROBStats::ROBStats(statistics::Group *parent)
: statistics::Group(parent, "rob"),
ADD_STAT(reads, statistics::units::Count::get(),
"The number of ROB reads"),
ADD_STAT(writes, statistics::units::Count::get(),
"The number of ROB writes")
{
}

8
src/cpu/o3/rob.hh
View File

@@ -328,14 +328,14 @@ class ROB
ThreadID numThreads;
struct ROBStats : public Stats::Group
struct ROBStats : public statistics::Group
{
ROBStats(Stats::Group *parent);
ROBStats(statistics::Group *parent);
// The number of rob_reads
Stats::Scalar reads;
statistics::Scalar reads;
// The number of rob_writes
Stats::Scalar writes;
statistics::Scalar writes;
} stats;
};

28
src/cpu/pred/bpred_unit.cc
View File

@@ -67,29 +67,29 @@ BPredUnit::BPredUnit(const Params &params)
r.init(params.RASSize);
}
BPredUnit::BPredUnitStats::BPredUnitStats(Stats::Group *parent)
: Stats::Group(parent),
ADD_STAT(lookups, Stats::units::Count::get(), "Number of BP lookups"),
ADD_STAT(condPredicted, Stats::units::Count::get(),
BPredUnit::BPredUnitStats::BPredUnitStats(statistics::Group *parent)
: statistics::Group(parent),
ADD_STAT(lookups, statistics::units::Count::get(), "Number of BP lookups"),
ADD_STAT(condPredicted, statistics::units::Count::get(),
"Number of conditional branches predicted"),
ADD_STAT(condIncorrect, Stats::units::Count::get(),
ADD_STAT(condIncorrect, statistics::units::Count::get(),
"Number of conditional branches incorrect"),
ADD_STAT(BTBLookups, Stats::units::Count::get(),
ADD_STAT(BTBLookups, statistics::units::Count::get(),
"Number of BTB lookups"),
ADD_STAT(BTBHits, Stats::units::Count::get(), "Number of BTB hits"),
ADD_STAT(BTBHitRatio, Stats::units::Ratio::get(), "BTB Hit Ratio",
ADD_STAT(BTBHits, statistics::units::Count::get(), "Number of BTB hits"),
ADD_STAT(BTBHitRatio, statistics::units::Ratio::get(), "BTB Hit Ratio",
BTBHits / BTBLookups),
ADD_STAT(RASUsed, Stats::units::Count::get(),
ADD_STAT(RASUsed, statistics::units::Count::get(),
"Number of times the RAS was used to get a target."),
ADD_STAT(RASIncorrect, Stats::units::Count::get(),
ADD_STAT(RASIncorrect, statistics::units::Count::get(),
"Number of incorrect RAS predictions."),
ADD_STAT(indirectLookups, Stats::units::Count::get(),
ADD_STAT(indirectLookups, statistics::units::Count::get(),
"Number of indirect predictor lookups."),
ADD_STAT(indirectHits, Stats::units::Count::get(),
ADD_STAT(indirectHits, statistics::units::Count::get(),
"Number of indirect target hits."),
ADD_STAT(indirectMisses, Stats::units::Count::get(),
ADD_STAT(indirectMisses, statistics::units::Count::get(),
"Number of indirect misses."),
ADD_STAT(indirectMispredicted, Stats::units::Count::get(),
ADD_STAT(indirectMispredicted, statistics::units::Count::get(),
"Number of mispredicted indirect branches.")
{
BTBHitRatio.precision(6);

28
src/cpu/pred/bpred_unit.hh
View File

@@ -278,35 +278,35 @@ class BPredUnit : public SimObject
/** The indirect target predictor. */
IndirectPredictor * iPred;
struct BPredUnitStats : public Stats::Group
struct BPredUnitStats : public statistics::Group
{
BPredUnitStats(Stats::Group *parent);
BPredUnitStats(statistics::Group *parent);
/** Stat for number of BP lookups. */
Stats::Scalar lookups;
statistics::Scalar lookups;
/** Stat for number of conditional branches predicted. */
Stats::Scalar condPredicted;
statistics::Scalar condPredicted;
/** Stat for number of conditional branches predicted incorrectly. */
Stats::Scalar condIncorrect;
statistics::Scalar condIncorrect;
/** Stat for number of BTB lookups. */
Stats::Scalar BTBLookups;
statistics::Scalar BTBLookups;
/** Stat for number of BTB hits. */
Stats::Scalar BTBHits;
statistics::Scalar BTBHits;
/** Stat for the ratio between BTB hits and BTB lookups. */
Stats::Formula BTBHitRatio;
statistics::Formula BTBHitRatio;
/** Stat for number of times the RAS is used to get a target. */
Stats::Scalar RASUsed;
statistics::Scalar RASUsed;
/** Stat for number of times the RAS is incorrect. */
Stats::Scalar RASIncorrect;
statistics::Scalar RASIncorrect;
/** Stat for the number of indirect target lookups.*/
Stats::Scalar indirectLookups;
statistics::Scalar indirectLookups;
/** Stat for the number of indirect target hits.*/
Stats::Scalar indirectHits;
statistics::Scalar indirectHits;
/** Stat for the number of indirect target misses.*/
Stats::Scalar indirectMisses;
statistics::Scalar indirectMisses;
/** Stat for the number of indirect target mispredictions.*/
Stats::Scalar indirectMispredicted;
statistics::Scalar indirectMispredicted;
} stats;
protected:

9
src/cpu/pred/loop_predictor.cc
View File

@@ -345,12 +345,13 @@ LoopPredictor::condBranchUpdate(ThreadID tid, Addr branch_pc, bool taken,
loopUpdate(branch_pc, taken, bi, tage_pred);
}
LoopPredictor::LoopPredictorStats::LoopPredictorStats(Stats::Group *parent)
: Stats::Group(parent),
ADD_STAT(correct, Stats::units::Count::get(),
LoopPredictor::LoopPredictorStats::LoopPredictorStats(
statistics::Group *parent)
: statistics::Group(parent),
ADD_STAT(correct, statistics::units::Count::get(),
"Number of times the loop predictor is the provider and the "
"prediction is correct"),
ADD_STAT(wrong, Stats::units::Count::get(),
ADD_STAT(wrong, statistics::units::Count::get(),
"Number of times the loop predictor is the provider and the "
"prediction is wrong")
{

8
src/cpu/pred/loop_predictor.hh
View File

@@ -83,11 +83,11 @@ class LoopPredictor : public SimObject
const unsigned initialLoopAge;
const bool optionalAgeReset;
struct LoopPredictorStats : public Stats::Group
struct LoopPredictorStats : public statistics::Group
{
LoopPredictorStats(Stats::Group *parent);
Stats::Scalar correct;
Stats::Scalar wrong;
LoopPredictorStats(statistics::Group *parent);
statistics::Scalar correct;
statistics::Scalar wrong;
} stats;
/**

8
src/cpu/pred/statistical_corrector.cc
View File

@@ -398,12 +398,12 @@ StatisticalCorrector::getSizeInBits() const
}
StatisticalCorrector::StatisticalCorrectorStats::StatisticalCorrectorStats(
Stats::Group *parent)
: Stats::Group(parent),
ADD_STAT(correct, Stats::units::Count::get(),
statistics::Group *parent)
: statistics::Group(parent),
ADD_STAT(correct, statistics::units::Count::get(),
"Number of time the SC predictor is the provider and the "
"prediction is correct"),
ADD_STAT(wrong, Stats::units::Count::get(),
ADD_STAT(wrong, statistics::units::Count::get(),
"Number of time the SC predictor is the provider and the "
"prediction is wrong")
{

8
src/cpu/pred/statistical_corrector.hh
View File

@@ -183,11 +183,11 @@ class StatisticalCorrector : public SimObject
int8_t firstH;
int8_t secondH;
struct StatisticalCorrectorStats : public Stats::Group
struct StatisticalCorrectorStats : public statistics::Group
{
StatisticalCorrectorStats(Stats::Group *parent);
Stats::Scalar correct;
Stats::Scalar wrong;
StatisticalCorrectorStats(statistics::Group *parent);
statistics::Scalar correct;
statistics::Scalar wrong;
} stats;
public:

28
src/cpu/pred/tage_base.cc
View File

@@ -717,41 +717,41 @@ TAGEBase::getGHR(ThreadID tid, BranchInfo *bi) const
}
TAGEBase::TAGEBaseStats::TAGEBaseStats(
Stats::Group *parent, unsigned nHistoryTables)
: Stats::Group(parent),
ADD_STAT(longestMatchProviderCorrect, Stats::units::Count::get(),
statistics::Group *parent, unsigned nHistoryTables)
: statistics::Group(parent),
ADD_STAT(longestMatchProviderCorrect, statistics::units::Count::get(),
"Number of times TAGE Longest Match is the provider and the "
"prediction is correct"),
ADD_STAT(altMatchProviderCorrect, Stats::units::Count::get(),
ADD_STAT(altMatchProviderCorrect, statistics::units::Count::get(),
"Number of times TAGE Alt Match is the provider and the "
"prediction is correct"),
ADD_STAT(bimodalAltMatchProviderCorrect, Stats::units::Count::get(),
ADD_STAT(bimodalAltMatchProviderCorrect, statistics::units::Count::get(),
"Number of times TAGE Alt Match is the bimodal and it is the "
"provider and the prediction is correct"),
ADD_STAT(bimodalProviderCorrect, Stats::units::Count::get(),
ADD_STAT(bimodalProviderCorrect, statistics::units::Count::get(),
"Number of times there are no hits on the TAGE tables and the "
"bimodal prediction is correct"),
ADD_STAT(longestMatchProviderWrong, Stats::units::Count::get(),
ADD_STAT(longestMatchProviderWrong, statistics::units::Count::get(),
"Number of times TAGE Longest Match is the provider and the "
"prediction is wrong"),
ADD_STAT(altMatchProviderWrong, Stats::units::Count::get(),
ADD_STAT(altMatchProviderWrong, statistics::units::Count::get(),
"Number of times TAGE Alt Match is the provider and the "
"prediction is wrong"),
ADD_STAT(bimodalAltMatchProviderWrong, Stats::units::Count::get(),
ADD_STAT(bimodalAltMatchProviderWrong, statistics::units::Count::get(),
"Number of times TAGE Alt Match is the bimodal and it is the "
"provider and the prediction is wrong"),
ADD_STAT(bimodalProviderWrong, Stats::units::Count::get(),
ADD_STAT(bimodalProviderWrong, statistics::units::Count::get(),
"Number of times there are no hits on the TAGE tables and the "
"bimodal prediction is wrong"),
ADD_STAT(altMatchProviderWouldHaveHit, Stats::units::Count::get(),
ADD_STAT(altMatchProviderWouldHaveHit, statistics::units::Count::get(),
"Number of times TAGE Longest Match is the provider, the "
"prediction is wrong and Alt Match prediction was correct"),
ADD_STAT(longestMatchProviderWouldHaveHit, Stats::units::Count::get(),
ADD_STAT(longestMatchProviderWouldHaveHit, statistics::units::Count::get(),
"Number of times TAGE Alt Match is the provider, the "
"prediction is wrong and Longest Match prediction was correct"),
ADD_STAT(longestMatchProvider, Stats::units::Count::get(),
ADD_STAT(longestMatchProvider, statistics::units::Count::get(),
"TAGE provider for longest match"),
ADD_STAT(altMatchProvider, Stats::units::Count::get(),
ADD_STAT(altMatchProvider, statistics::units::Count::get(),
"TAGE provider for alt match")
{
longestMatchProvider.init(nHistoryTables + 1);

28
src/cpu/pred/tage_base.hh
View File

@@ -485,23 +485,23 @@ class TAGEBase : public SimObject
bool initialized;
struct TAGEBaseStats : public Stats::Group
struct TAGEBaseStats : public statistics::Group
{
TAGEBaseStats(Stats::Group *parent, unsigned nHistoryTables);
TAGEBaseStats(statistics::Group *parent, unsigned nHistoryTables);
// stats
Stats::Scalar longestMatchProviderCorrect;
Stats::Scalar altMatchProviderCorrect;
Stats::Scalar bimodalAltMatchProviderCorrect;
Stats::Scalar bimodalProviderCorrect;
Stats::Scalar longestMatchProviderWrong;
Stats::Scalar altMatchProviderWrong;
Stats::Scalar bimodalAltMatchProviderWrong;
Stats::Scalar bimodalProviderWrong;
Stats::Scalar altMatchProviderWouldHaveHit;
Stats::Scalar longestMatchProviderWouldHaveHit;
statistics::Scalar longestMatchProviderCorrect;
statistics::Scalar altMatchProviderCorrect;
statistics::Scalar bimodalAltMatchProviderCorrect;
statistics::Scalar bimodalProviderCorrect;
statistics::Scalar longestMatchProviderWrong;
statistics::Scalar altMatchProviderWrong;
statistics::Scalar bimodalAltMatchProviderWrong;
statistics::Scalar bimodalProviderWrong;
statistics::Scalar altMatchProviderWouldHaveHit;
statistics::Scalar longestMatchProviderWouldHaveHit;
Stats::Vector longestMatchProvider;
Stats::Vector altMatchProvider;
statistics::Vector longestMatchProvider;
statistics::Vector altMatchProvider;
} stats;
};

2
src/cpu/profile.cc
View File

@@ -97,7 +97,7 @@ FunctionProfile::FunctionProfile(std::unique_ptr<BaseStackTrace> _trace,
const loader::SymbolTable &_symtab) :
symtab(_symtab), trace(std::move(_trace))
{
Stats::registerResetCallback([this]() { clear(); });
statistics::registerResetCallback([this]() { clear(); });
}
ProfileNode *

144
src/cpu/simple/exec_context.hh
View File

@@ -79,84 +79,84 @@ class SimpleExecContext : public ExecContext
// Number of cycles stalled for D-cache responses
Counter lastDcacheStall;
struct ExecContextStats : public Stats::Group
struct ExecContextStats : public statistics::Group
{
ExecContextStats(BaseSimpleCPU *cpu, SimpleThread *thread)
: Stats::Group(cpu,
: statistics::Group(cpu,
csprintf("exec_context.thread_%i",
thread->threadId()).c_str()),
ADD_STAT(numInsts, Stats::units::Count::get(),
ADD_STAT(numInsts, statistics::units::Count::get(),
"Number of instructions committed"),
ADD_STAT(numOps, Stats::units::Count::get(),
ADD_STAT(numOps, statistics::units::Count::get(),
"Number of ops (including micro ops) committed"),
ADD_STAT(numIntAluAccesses, Stats::units::Count::get(),
ADD_STAT(numIntAluAccesses, statistics::units::Count::get(),
"Number of integer alu accesses"),
ADD_STAT(numFpAluAccesses, Stats::units::Count::get(),
ADD_STAT(numFpAluAccesses, statistics::units::Count::get(),
"Number of float alu accesses"),
ADD_STAT(numVecAluAccesses, Stats::units::Count::get(),
ADD_STAT(numVecAluAccesses, statistics::units::Count::get(),
"Number of vector alu accesses"),
ADD_STAT(numCallsReturns, Stats::units::Count::get(),
ADD_STAT(numCallsReturns, statistics::units::Count::get(),
"Number of times a function call or return occured"),
ADD_STAT(numCondCtrlInsts, Stats::units::Count::get(),
ADD_STAT(numCondCtrlInsts, statistics::units::Count::get(),
"Number of instructions that are conditional controls"),
ADD_STAT(numIntInsts, Stats::units::Count::get(),
ADD_STAT(numIntInsts, statistics::units::Count::get(),
"Number of integer instructions"),
ADD_STAT(numFpInsts, Stats::units::Count::get(),
ADD_STAT(numFpInsts, statistics::units::Count::get(),
"Number of float instructions"),
ADD_STAT(numVecInsts, Stats::units::Count::get(),
ADD_STAT(numVecInsts, statistics::units::Count::get(),
"Number of vector instructions"),
ADD_STAT(numIntRegReads, Stats::units::Count::get(),
ADD_STAT(numIntRegReads, statistics::units::Count::get(),
"Number of times the integer registers were read"),
ADD_STAT(numIntRegWrites, Stats::units::Count::get(),
ADD_STAT(numIntRegWrites, statistics::units::Count::get(),
"Number of times the integer registers were written"),
ADD_STAT(numFpRegReads, Stats::units::Count::get(),
ADD_STAT(numFpRegReads, statistics::units::Count::get(),
"Number of times the floating registers were read"),
ADD_STAT(numFpRegWrites, Stats::units::Count::get(),
ADD_STAT(numFpRegWrites, statistics::units::Count::get(),
"Number of times the floating registers were written"),
ADD_STAT(numVecRegReads, Stats::units::Count::get(),
ADD_STAT(numVecRegReads, statistics::units::Count::get(),
"Number of times the vector registers were read"),
ADD_STAT(numVecRegWrites, Stats::units::Count::get(),
ADD_STAT(numVecRegWrites, statistics::units::Count::get(),
"Number of times the vector registers were written"),
ADD_STAT(numVecPredRegReads, Stats::units::Count::get(),
ADD_STAT(numVecPredRegReads, statistics::units::Count::get(),
"Number of times the predicate registers were read"),
ADD_STAT(numVecPredRegWrites, Stats::units::Count::get(),
ADD_STAT(numVecPredRegWrites, statistics::units::Count::get(),
"Number of times the predicate registers were written"),
ADD_STAT(numCCRegReads, Stats::units::Count::get(),
ADD_STAT(numCCRegReads, statistics::units::Count::get(),
"Number of times the CC registers were read"),
ADD_STAT(numCCRegWrites, Stats::units::Count::get(),
ADD_STAT(numCCRegWrites, statistics::units::Count::get(),
"Number of times the CC registers were written"),
ADD_STAT(numMemRefs, Stats::units::Count::get(),
ADD_STAT(numMemRefs, statistics::units::Count::get(),
"Number of memory refs"),
ADD_STAT(numLoadInsts, Stats::units::Count::get(),
ADD_STAT(numLoadInsts, statistics::units::Count::get(),
"Number of load instructions"),
ADD_STAT(numStoreInsts, Stats::units::Count::get(),
ADD_STAT(numStoreInsts, statistics::units::Count::get(),
"Number of store instructions"),
ADD_STAT(numIdleCycles, Stats::units::Cycle::get(),
ADD_STAT(numIdleCycles, statistics::units::Cycle::get(),
"Number of idle cycles"),
ADD_STAT(numBusyCycles, Stats::units::Cycle::get(),
ADD_STAT(numBusyCycles, statistics::units::Cycle::get(),
"Number of busy cycles"),
ADD_STAT(notIdleFraction, Stats::units::Ratio::get(),
ADD_STAT(notIdleFraction, statistics::units::Ratio::get(),
"Percentage of non-idle cycles"),
ADD_STAT(idleFraction, Stats::units::Ratio::get(),
ADD_STAT(idleFraction, statistics::units::Ratio::get(),
"Percentage of idle cycles"),
ADD_STAT(icacheStallCycles, Stats::units::Cycle::get(),
ADD_STAT(icacheStallCycles, statistics::units::Cycle::get(),
"ICache total stall cycles"),
ADD_STAT(dcacheStallCycles, Stats::units::Cycle::get(),
ADD_STAT(dcacheStallCycles, statistics::units::Cycle::get(),
"DCache total stall cycles"),
ADD_STAT(numBranches, Stats::units::Count::get(),
ADD_STAT(numBranches, statistics::units::Count::get(),
"Number of branches fetched"),
ADD_STAT(numPredictedBranches, Stats::units::Count::get(),
ADD_STAT(numPredictedBranches, statistics::units::Count::get(),
"Number of branches predicted as taken"),
ADD_STAT(numBranchMispred, Stats::units::Count::get(),
ADD_STAT(numBranchMispred, statistics::units::Count::get(),
"Number of branch mispredictions"),
ADD_STAT(statExecutedInstType, Stats::units::Count::get(),
ADD_STAT(statExecutedInstType, statistics::units::Count::get(),
"Class of executed instruction.")
{
numCCRegReads
.flags(Stats::nozero);
.flags(statistics::nozero);
numCCRegWrites
.flags(Stats::nozero);
.flags(statistics::nozero);
icacheStallCycles
.prereq(icacheStallCycles);
@@ -166,13 +166,13 @@ class SimpleExecContext : public ExecContext
statExecutedInstType
.init(enums::Num_OpClass)
.flags(Stats::total | Stats::pdf | Stats::dist);
.flags(statistics::total | statistics::pdf | statistics::dist);
for (unsigned i = 0; i < Num_OpClasses; ++i) {
statExecutedInstType.subname(i, enums::OpClassStrings[i]);
}
idleFraction = Stats::constant(1.0) - notIdleFraction;
idleFraction = statistics::constant(1.0) - notIdleFraction;
numIdleCycles = idleFraction * cpu->baseStats.numCycles;
numBusyCycles = notIdleFraction * cpu->baseStats.numCycles;
@@ -187,85 +187,85 @@ class SimpleExecContext : public ExecContext
}
// Number of simulated instructions
Stats::Scalar numInsts;
Stats::Scalar numOps;
statistics::Scalar numInsts;
statistics::Scalar numOps;
// Number of integer alu accesses
Stats::Scalar numIntAluAccesses;
statistics::Scalar numIntAluAccesses;
// Number of float alu accesses
Stats::Scalar numFpAluAccesses;
statistics::Scalar numFpAluAccesses;
// Number of vector alu accesses
Stats::Scalar numVecAluAccesses;
statistics::Scalar numVecAluAccesses;
// Number of function calls/returns
Stats::Scalar numCallsReturns;
statistics::Scalar numCallsReturns;
// Conditional control instructions;
Stats::Scalar numCondCtrlInsts;
statistics::Scalar numCondCtrlInsts;
// Number of int instructions
Stats::Scalar numIntInsts;
statistics::Scalar numIntInsts;
// Number of float instructions
Stats::Scalar numFpInsts;
statistics::Scalar numFpInsts;
// Number of vector instructions
Stats::Scalar numVecInsts;
statistics::Scalar numVecInsts;
// Number of integer register file accesses
Stats::Scalar numIntRegReads;
Stats::Scalar numIntRegWrites;
statistics::Scalar numIntRegReads;
statistics::Scalar numIntRegWrites;
// Number of float register file accesses
Stats::Scalar numFpRegReads;
Stats::Scalar numFpRegWrites;
statistics::Scalar numFpRegReads;
statistics::Scalar numFpRegWrites;
// Number of vector register file accesses
mutable Stats::Scalar numVecRegReads;
Stats::Scalar numVecRegWrites;
mutable statistics::Scalar numVecRegReads;
statistics::Scalar numVecRegWrites;
// Number of predicate register file accesses
mutable Stats::Scalar numVecPredRegReads;
Stats::Scalar numVecPredRegWrites;
mutable statistics::Scalar numVecPredRegReads;
statistics::Scalar numVecPredRegWrites;
// Number of condition code register file accesses
Stats::Scalar numCCRegReads;
Stats::Scalar numCCRegWrites;
statistics::Scalar numCCRegReads;
statistics::Scalar numCCRegWrites;
// Number of simulated memory references
Stats::Scalar numMemRefs;
Stats::Scalar numLoadInsts;
Stats::Scalar numStoreInsts;
statistics::Scalar numMemRefs;
statistics::Scalar numLoadInsts;
statistics::Scalar numStoreInsts;
// Number of idle cycles
Stats::Formula numIdleCycles;
statistics::Formula numIdleCycles;
// Number of busy cycles
Stats::Formula numBusyCycles;
statistics::Formula numBusyCycles;
// Number of idle cycles
Stats::Average notIdleFraction;
Stats::Formula idleFraction;
statistics::Average notIdleFraction;
statistics::Formula idleFraction;
// Number of cycles stalled for I-cache responses
Stats::Scalar icacheStallCycles;
statistics::Scalar icacheStallCycles;
// Number of cycles stalled for D-cache responses
Stats::Scalar dcacheStallCycles;
statistics::Scalar dcacheStallCycles;
/// @{
/// Total number of branches fetched
Stats::Scalar numBranches;
statistics::Scalar numBranches;
/// Number of branches predicted as taken
Stats::Scalar numPredictedBranches;
statistics::Scalar numPredictedBranches;
/// Number of misprediced branches
Stats::Scalar numBranchMispred;
statistics::Scalar numBranchMispred;
/// @}
// Instruction mix histogram by OpClass
Stats::Vector statExecutedInstType;
statistics::Vector statExecutedInstType;
} execContextStats;

8
src/cpu/testers/memtest/memtest.cc
View File

@@ -189,11 +189,11 @@ MemTest::completeRequest(PacketPtr pkt, bool functional)
else if (noResponseEvent.scheduled())
deschedule(noResponseEvent);
}
MemTest::MemTestStats::MemTestStats(Stats::Group *parent)
: Stats::Group(parent),
ADD_STAT(numReads, Stats::units::Count::get(),
MemTest::MemTestStats::MemTestStats(statistics::Group *parent)
: statistics::Group(parent),
ADD_STAT(numReads, statistics::units::Count::get(),
"number of read accesses completed"),
ADD_STAT(numWrites, Stats::units::Count::get(),
ADD_STAT(numWrites, statistics::units::Count::get(),
"number of write accesses completed")
{

8
src/cpu/testers/memtest/memtest.hh
View File

@@ -166,11 +166,11 @@ class MemTest : public ClockedObject
const bool suppressFuncErrors;
protected:
struct MemTestStats : public Stats::Group
struct MemTestStats : public statistics::Group
{
MemTestStats(Stats::Group *parent);
Stats::Scalar numReads;
Stats::Scalar numWrites;
MemTestStats(statistics::Group *parent);
statistics::Scalar numReads;
statistics::Scalar numWrites;
} stats;
/**

40
src/cpu/testers/traffic_gen/base.cc
View File

@@ -330,36 +330,36 @@ BaseTrafficGen::noProgress()
name(), progressCheck);
}
BaseTrafficGen::StatGroup::StatGroup(Stats::Group *parent)
: Stats::Group(parent),
ADD_STAT(numSuppressed, Stats::units::Count::get(),
BaseTrafficGen::StatGroup::StatGroup(statistics::Group *parent)
: statistics::Group(parent),
ADD_STAT(numSuppressed, statistics::units::Count::get(),
"Number of suppressed packets to non-memory space"),
ADD_STAT(numPackets, Stats::units::Count::get(),
ADD_STAT(numPackets, statistics::units::Count::get(),
"Number of packets generated"),
ADD_STAT(numRetries, Stats::units::Count::get(), "Number of retries"),
ADD_STAT(retryTicks, Stats::units::Tick::get(),
ADD_STAT(numRetries, statistics::units::Count::get(), "Number of retries"),
ADD_STAT(retryTicks, statistics::units::Tick::get(),
"Time spent waiting due to back-pressure"),
ADD_STAT(bytesRead, Stats::units::Byte::get(), "Number of bytes read"),
ADD_STAT(bytesWritten, Stats::units::Byte::get(),
ADD_STAT(bytesRead, statistics::units::Byte::get(), "Number of bytes read"),
ADD_STAT(bytesWritten, statistics::units::Byte::get(),
"Number of bytes written"),
ADD_STAT(totalReadLatency, Stats::units::Tick::get(),
ADD_STAT(totalReadLatency, statistics::units::Tick::get(),
"Total latency of read requests"),
ADD_STAT(totalWriteLatency, Stats::units::Tick::get(),
ADD_STAT(totalWriteLatency, statistics::units::Tick::get(),
"Total latency of write requests"),
ADD_STAT(totalReads, Stats::units::Count::get(), "Total num of reads"),
ADD_STAT(totalWrites, Stats::units::Count::get(), "Total num of writes"),
ADD_STAT(avgReadLatency, Stats::units::Rate<
Stats::units::Tick, Stats::units::Count>::get(),
ADD_STAT(totalReads, statistics::units::Count::get(), "Total num of reads"),
ADD_STAT(totalWrites, statistics::units::Count::get(), "Total num of writes"),
ADD_STAT(avgReadLatency, statistics::units::Rate<
statistics::units::Tick, statistics::units::Count>::get(),
"Avg latency of read requests", totalReadLatency / totalReads),
ADD_STAT(avgWriteLatency, Stats::units::Rate<
Stats::units::Tick, Stats::units::Count>::get(),
ADD_STAT(avgWriteLatency, statistics::units::Rate<
statistics::units::Tick, statistics::units::Count>::get(),
"Avg latency of write requests",
totalWriteLatency / totalWrites),
ADD_STAT(readBW, Stats::units::Rate<
Stats::units::Byte, Stats::units::Second>::get(),
ADD_STAT(readBW, statistics::units::Rate<
statistics::units::Byte, statistics::units::Second>::get(),
"Read bandwidth", bytesRead / simSeconds),
ADD_STAT(writeBW, Stats::units::Rate<
Stats::units::Byte, Stats::units::Second>::get(),
ADD_STAT(writeBW, statistics::units::Rate<
statistics::units::Byte, statistics::units::Second>::get(),
"Write bandwidth", bytesWritten / simSeconds)
{
}

32
src/cpu/testers/traffic_gen/base.hh
View File

@@ -191,51 +191,51 @@ class BaseTrafficGen : public ClockedObject
/** Reqs waiting for response **/
std::unordered_map<RequestPtr,Tick> waitingResp;
struct StatGroup : public Stats::Group
struct StatGroup : public statistics::Group
{
StatGroup(Stats::Group *parent);
StatGroup(statistics::Group *parent);
/** Count the number of dropped requests. */
Stats::Scalar numSuppressed;
statistics::Scalar numSuppressed;
/** Count the number of generated packets. */
Stats::Scalar numPackets;
statistics::Scalar numPackets;
/** Count the number of retries. */
Stats::Scalar numRetries;
statistics::Scalar numRetries;
/** Count the time incurred from back-pressure. */
Stats::Scalar retryTicks;
statistics::Scalar retryTicks;
/** Count the number of bytes read. */
Stats::Scalar bytesRead;
statistics::Scalar bytesRead;
/** Count the number of bytes written. */
Stats::Scalar bytesWritten;
statistics::Scalar bytesWritten;
/** Total num of ticks read reqs took to complete */
Stats::Scalar totalReadLatency;
statistics::Scalar totalReadLatency;
/** Total num of ticks write reqs took to complete */
Stats::Scalar totalWriteLatency;
statistics::Scalar totalWriteLatency;
/** Count the number reads. */
Stats::Scalar totalReads;
statistics::Scalar totalReads;
/** Count the number writes. */
Stats::Scalar totalWrites;
statistics::Scalar totalWrites;
/** Avg num of ticks each read req took to complete */
Stats::Formula avgReadLatency;
statistics::Formula avgReadLatency;
/** Avg num of ticks each write reqs took to complete */
Stats::Formula avgWriteLatency;
statistics::Formula avgWriteLatency;
/** Read bandwidth in bytes/s */
Stats::Formula readBW;
statistics::Formula readBW;
/** Write bandwidth in bytes/s */
Stats::Formula writeBW;
statistics::Formula writeBW;
} stats;
public:

9
src/cpu/thread_state.cc
View File

@@ -90,11 +90,12 @@ ThreadState::getVirtProxy()
ThreadState::ThreadStateStats::ThreadStateStats(BaseCPU *cpu,
const ThreadID& tid)
: Stats::Group(cpu, csprintf("thread_%i", tid).c_str()),
ADD_STAT(numInsts, Stats::units::Count::get(),
: statistics::Group(cpu, csprintf("thread_%i", tid).c_str()),
ADD_STAT(numInsts, statistics::units::Count::get(),
"Number of Instructions committed"),
ADD_STAT(numOps, Stats::units::Count::get(), "Number of Ops committed"),
ADD_STAT(numMemRefs, Stats::units::Count::get(),
ADD_STAT(numOps, statistics::units::Count::get(),
"Number of Ops committed"),
ADD_STAT(numMemRefs, statistics::units::Count::get(),
"Number of Memory References")
{

8
src/cpu/thread_state.hh
View File

@@ -96,15 +96,15 @@ struct ThreadState : public Serializable
/** Number of ops (including micro ops) committed. */
Counter numOp;
// Defining the stat group
struct ThreadStateStats : public Stats::Group
struct ThreadStateStats : public statistics::Group
{
ThreadStateStats(BaseCPU *cpu, const ThreadID& thread);
/** Stat for number instructions committed. */
Stats::Scalar numInsts;
statistics::Scalar numInsts;
/** Stat for number ops (including micro ops) committed. */
Stats::Scalar numOps;
statistics::Scalar numOps;
/** Stat for number of memory references. */
Stats::Scalar numMemRefs;
statistics::Scalar numMemRefs;
} threadStats;
/** Number of simulated loads, used for tracking events based on

50
src/cpu/trace/trace_cpu.cc
View File

@@ -202,16 +202,16 @@ TraceCPU::checkAndSchedExitEvent()
}
}
TraceCPU::TraceStats::TraceStats(TraceCPU *trace) :
Stats::Group(trace),
ADD_STAT(numSchedDcacheEvent, Stats::units::Count::get(),
statistics::Group(trace),
ADD_STAT(numSchedDcacheEvent, statistics::units::Count::get(),
"Number of events scheduled to trigger data request generator"),
ADD_STAT(numSchedIcacheEvent, Stats::units::Count::get(),
ADD_STAT(numSchedIcacheEvent, statistics::units::Count::get(),
"Number of events scheduled to trigger instruction request "
"generator"),
ADD_STAT(numOps, Stats::units::Count::get(),
ADD_STAT(numOps, statistics::units::Count::get(),
"Number of micro-ops simulated by the Trace CPU"),
ADD_STAT(cpi, Stats::units::Rate<
Stats::units::Cycle, Stats::units::Count>::get(),
ADD_STAT(cpi, statistics::units::Rate<
statistics::units::Cycle, statistics::units::Count>::get(),
"Cycles per micro-op used as a proxy for CPI",
trace->baseStats.numCycles / numOps)
{
@@ -219,28 +219,28 @@ TraceCPU::checkAndSchedExitEvent()
}
TraceCPU::ElasticDataGen::
ElasticDataGenStatGroup::ElasticDataGenStatGroup(Stats::Group *parent,
ElasticDataGenStatGroup::ElasticDataGenStatGroup(statistics::Group *parent,
const std::string& _name) :
Stats::Group(parent, _name.c_str()),
ADD_STAT(maxDependents, Stats::units::Count::get(),
statistics::Group(parent, _name.c_str()),
ADD_STAT(maxDependents, statistics::units::Count::get(),
"Max number of dependents observed on a node"),
ADD_STAT(maxReadyListSize, Stats::units::Count::get(),
ADD_STAT(maxReadyListSize, statistics::units::Count::get(),
"Max size of the ready list observed"),
ADD_STAT(numSendAttempted, Stats::units::Count::get(),
ADD_STAT(numSendAttempted, statistics::units::Count::get(),
"Number of first attempts to send a request"),
ADD_STAT(numSendSucceeded, Stats::units::Count::get(),
ADD_STAT(numSendSucceeded, statistics::units::Count::get(),
"Number of successful first attempts"),
ADD_STAT(numSendFailed, Stats::units::Count::get(),
ADD_STAT(numSendFailed, statistics::units::Count::get(),
"Number of failed first attempts"),
ADD_STAT(numRetrySucceeded, Stats::units::Count::get(),
ADD_STAT(numRetrySucceeded, statistics::units::Count::get(),
"Number of successful retries"),
ADD_STAT(numSplitReqs, Stats::units::Count::get(),
ADD_STAT(numSplitReqs, statistics::units::Count::get(),
"Number of split requests"),
ADD_STAT(numSOLoads, Stats::units::Count::get(),
ADD_STAT(numSOLoads, statistics::units::Count::get(),
"Number of strictly ordered loads"),
ADD_STAT(numSOStores, Stats::units::Count::get(),
ADD_STAT(numSOStores, statistics::units::Count::get(),
"Number of strictly ordered stores"),
ADD_STAT(dataLastTick, Stats::units::Tick::get(),
ADD_STAT(dataLastTick, statistics::units::Tick::get(),
"Last tick simulated from the elastic data trace")
{
}
@@ -966,17 +966,17 @@ TraceCPU::ElasticDataGen::HardwareResource::printOccupancy()
}
TraceCPU::FixedRetryGen::FixedRetryGenStatGroup::FixedRetryGenStatGroup(
Stats::Group *parent, const std::string& _name) :
Stats::Group(parent, _name.c_str()),
ADD_STAT(numSendAttempted, Stats::units::Count::get(),
statistics::Group *parent, const std::string& _name) :
statistics::Group(parent, _name.c_str()),
ADD_STAT(numSendAttempted, statistics::units::Count::get(),
"Number of first attempts to send a request"),
ADD_STAT(numSendSucceeded, Stats::units::Count::get(),
ADD_STAT(numSendSucceeded, statistics::units::Count::get(),
"Number of successful first attempts"),
ADD_STAT(numSendFailed, Stats::units::Count::get(),
ADD_STAT(numSendFailed, statistics::units::Count::get(),
"Number of failed first attempts"),
ADD_STAT(numRetrySucceeded, Stats::units::Count::get(),
ADD_STAT(numRetrySucceeded, statistics::units::Count::get(),
"Number of successful retries"),
ADD_STAT(instLastTick, Stats::units::Tick::get(),
ADD_STAT(instLastTick, statistics::units::Tick::get(),
"Last tick simulated from the fixed inst trace")
{

48
src/cpu/trace/trace_cpu.hh
View File

@@ -506,18 +506,18 @@ class TraceCPU : public BaseCPU
/** Store an element read from the trace to send as the next packet. */
TraceElement currElement;
protected:
struct FixedRetryGenStatGroup : public Stats::Group
struct FixedRetryGenStatGroup : public statistics::Group
{
/** name is the extension to the name for these stats */
FixedRetryGenStatGroup(Stats::Group *parent,
FixedRetryGenStatGroup(statistics::Group *parent,
const std::string& _name);
/** Stats for instruction accesses replayed. */
Stats::Scalar numSendAttempted;
Stats::Scalar numSendSucceeded;
Stats::Scalar numSendFailed;
Stats::Scalar numRetrySucceeded;
statistics::Scalar numSendAttempted;
statistics::Scalar numSendSucceeded;
statistics::Scalar numSendFailed;
statistics::Scalar numRetrySucceeded;
/** Last simulated tick by the FixedRetryGen */
Stats::Scalar instLastTick;
statistics::Scalar instLastTick;
} fixedStats;
};
@@ -1004,23 +1004,23 @@ class TraceCPU : public BaseCPU
protected:
// Defining the a stat group
struct ElasticDataGenStatGroup : public Stats::Group
struct ElasticDataGenStatGroup : public statistics::Group
{
/** name is the extension to the name for these stats */
ElasticDataGenStatGroup(Stats::Group *parent,
ElasticDataGenStatGroup(statistics::Group *parent,
const std::string& _name);
/** Stats for data memory accesses replayed. */
Stats::Scalar maxDependents;
Stats::Scalar maxReadyListSize;
Stats::Scalar numSendAttempted;
Stats::Scalar numSendSucceeded;
Stats::Scalar numSendFailed;
Stats::Scalar numRetrySucceeded;
Stats::Scalar numSplitReqs;
Stats::Scalar numSOLoads;
Stats::Scalar numSOStores;
statistics::Scalar maxDependents;
statistics::Scalar maxReadyListSize;
statistics::Scalar numSendAttempted;
statistics::Scalar numSendSucceeded;
statistics::Scalar numSendFailed;
statistics::Scalar numRetrySucceeded;
statistics::Scalar numSplitReqs;
statistics::Scalar numSOLoads;
statistics::Scalar numSOStores;
/** Tick when ElasticDataGen completes execution */
Stats::Scalar dataLastTick;
statistics::Scalar dataLastTick;
} elasticStats;
};
@@ -1101,17 +1101,17 @@ class TraceCPU : public BaseCPU
* message is printed.
*/
uint64_t progressMsgThreshold;
struct TraceStats : public Stats::Group
struct TraceStats : public statistics::Group
{
TraceStats(TraceCPU *trace);
Stats::Scalar numSchedDcacheEvent;
Stats::Scalar numSchedIcacheEvent;
statistics::Scalar numSchedDcacheEvent;
statistics::Scalar numSchedIcacheEvent;
/** Stat for number of simulated micro-ops. */
Stats::Scalar numOps;
statistics::Scalar numOps;
/** Stat for the CPI. This is really cycles per
* micro-op and not inst. */
Stats::Formula cpi;
statistics::Formula cpi;
} traceStats;
public: