diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh index e32dc79215..89df257e98 100644 --- a/src/cpu/o3/commit_impl.hh +++ b/src/cpu/o3/commit_impl.hh @@ -910,25 +910,21 @@ DefaultCommit::commitInsts() microPC[tid] = nextMicroPC[tid]; nextMicroPC[tid] = microPC[tid] + 1; -#if FULL_SYSTEM int count = 0; Addr oldpc; + // Debug statement. Checks to make sure we're not + // currently updating state while handling PC events. + assert(!thread[tid]->inSyscall && !thread[tid]->trapPending); do { - // Debug statement. Checks to make sure we're not - // currently updating state while handling PC events. - if (count == 0) - assert(!thread[tid]->inSyscall && - !thread[tid]->trapPending); oldpc = PC[tid]; - cpu->system->pcEventQueue.service( - thread[tid]->getTC()); + cpu->system->pcEventQueue.service(thread[tid]->getTC()); count++; } while (oldpc != PC[tid]); if (count > 1) { - DPRINTF(Commit, "PC skip function event, stopping commit\n"); + DPRINTF(Commit, + "PC skip function event, stopping commit\n"); break; } -#endif } else { DPRINTF(Commit, "Unable to commit head instruction PC:%#x " "[tid:%i] [sn:%i].\n", diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc index 9fc1d1dd93..812a15c87c 100644 --- a/src/cpu/simple/base.cc +++ b/src/cpu/simple/base.cc @@ -493,12 +493,10 @@ BaseSimpleCPU::advancePC(Fault fault) } } -#if FULL_SYSTEM Addr oldpc; do { oldpc = thread->readPC(); system->pcEventQueue.service(tc); } while (oldpc != thread->readPC()); -#endif }