add translations for new sections that are mmapped or when the brk

is changed
Add a default machine width parameter
Arch based live processes

arch/alpha/linux/process.cc:
arch/alpha/linux/process.hh:
arch/alpha/process.cc:
arch/alpha/process.hh:
arch/alpha/tru64/process.cc:
arch/alpha/tru64/process.hh:
arch/mips/linux_process.cc:
arch/mips/process.cc:
arch/mips/process.hh:
arch/sparc/linux/process.cc:
arch/sparc/linux/process.hh:
arch/sparc/process.cc:
arch/sparc/process.hh:
configs/test/test.py:
python/m5/objects/Process.py:
sim/process.cc:
sim/process.hh:
    Architecture based live processes
arch/mips/isa_traits.hh:
arch/sparc/isa_traits.hh:
    Add a default machine width parameter
mem/port.hh:
    gcc 4 really wants  a virtual destructor
sim/byteswap.hh:
    remove the comment around long and unsigned long even though uint32_t
    and int32_t are defined. Seems to work with gcc 4 and 3.4.3.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    add translations for new sections that are mmapped or when the brk
    is changed

--HG--
extra : convert_revision : e2f9f228113c7127c87ef2358209a399c30ed5c6

python/m5/objects/Process.py

@@ -12,6 +12,15 @@ class LiveProcess(Process):
     env = VectorParam.String('', "environment settings")
     input = Param.String('cin', "filename for stdin")
 
+class AlphaLiveProcess(LiveProcess):
+    type = 'AlphaLiveProcess'
+
+class SparcLiveProcess(LiveProcess):
+    type = 'SparcLiveProcess'
+
+class MipsLiveProcess(LiveProcess):
+    type = 'MipsLiveProcess'
+
 class EioProcess(Process):
     type = 'EioProcess'
     chkpt = Param.String('', "EIO checkpoint file name (optional)")