Merge zed.eecs.umich.edu:/.automount/fox/y/mserrano/m5_dir/m5
into zed.eecs.umich.edu:/z/benash/bk/m5 --HG-- extra : convert_revision : 9b7ca872187a13179118ad0651301d531332dc63
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@@ -147,13 +147,15 @@ Uart8250::read(MemReqPtr &req, uint8_t *data)
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case 0x2: // Intr Identification Register (IIR)
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DPRINTF(Uart, "IIR Read, status = %#x\n", (uint32_t)status);
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//Tx interrupts are cleared on IIR reads
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status &= ~TX_INT;
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if (status & RX_INT)
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if (status & RX_INT) /* Rx data interrupt has a higher priority */
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*(uint8_t*)data = IIR_RXID;
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else if (status & TX_INT)
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*(uint8_t*)data = IIR_TXID;
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else
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*(uint8_t*)data = IIR_NOPEND;
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//Tx interrupts are cleared on IIR reads
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status &= ~TX_INT;
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break;
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case 0x3: // Line Control Register (LCR)
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*(uint8_t*)data = LCR;
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