ARM: Fix some subtle bugs in the GIC

The GIC code can write to the registers with 8, 16, or 32 byte
accesses which could set/clear different numbers of interrupts.
This commit is contained in:
Prakash Ramrakhyani
2010-10-01 16:04:00 -05:00
parent 521d68c82a
commit 9792bbc324
3 changed files with 136 additions and 31 deletions

View File

@@ -51,3 +51,4 @@ if env['FULL_SYSTEM'] and env['TARGET_ISA'] == 'arm':
Source('realview.cc')
TraceFlag('AMBA')
TraceFlag('GIC')