From 942a9ea503e5a053b5fbd56535ef31bd58921177 Mon Sep 17 00:00:00 2001
From: Roger Chang <rogerycchang@google.com>
Date: Sat, 3 Jun 2023 10:30:38 +0800
Subject: [PATCH] stdlib: Add U74VecFU to U74CPU

This change is to elimilate the warning message from U74CPU.

Change-Id: I7a5d0cd0b2955e54ed14fc1ac6f7127bd7f0604b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/71238
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
---
 src/python/gem5/prebuilt/riscvmatched/riscvmatched_core.py | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/python/gem5/prebuilt/riscvmatched/riscvmatched_core.py b/src/python/gem5/prebuilt/riscvmatched/riscvmatched_core.py
index 48291bf670..4b8d2c1d32 100644
--- a/src/python/gem5/prebuilt/riscvmatched/riscvmatched_core.py
+++ b/src/python/gem5/prebuilt/riscvmatched/riscvmatched_core.py
@@ -75,6 +75,10 @@ class U74MiscFU(MinorDefaultMiscFU):
     pass
 
 
+class U74VecFU(MinorDefaultVecFU):
+    pass
+
+
 class U74FUPool(MinorFUPool):
     funcUnits = [
         U74IntFU(),
@@ -86,6 +90,7 @@ class U74FUPool(MinorFUPool):
         U74MemReadFU(),
         U74MemWriteFU(),
         U74MiscFU(),
+        U74VecFU(),
     ]