Get basic full-system working with AtomicSimpleCPU.

SConscript:
    Comment out sinic for now... needs to be fixed to compile under newmem.
configs/test/SysPaths.py:
    Fix paths.
configs/test/fs.py:
    SimpleCPU -> AtomicSimpleCPU
    Fix vmlinux path
cpu/simple/atomic.cc:
    Fix suspendContext() so quiesce works.
    Don't forget to checkForInterrupts().
cpu/simple/base.cc:
    Minor fix to interrupt check code.
dev/ide_disk.hh:
    Don't declare regStats() in header since it's not in
    .cc file anymore (will need to add it back in when
    stats are added back).
dev/io_device.cc:
    Set packet dest to Packet::Broadcast.
dev/pciconfigall.cc:
    Set PCI config packet result to Success.
python/m5/objects/Root.py:
    Add debug object to Root so things like break_cycles
    can be set from command line.

--HG--
extra : convert_revision : aa1c652fe589784e753e13ad9acb0cd5f3b6eafb

dev/ide_disk.hh

@@ -259,12 +259,6 @@ class IdeDisk : public SimObject
      */
     void reset(int id);
 
-    /**
-     * Register statistics.
-     */
-    void regStats();
-
-
     /**
      * Set the controller for this device
      * @param c The IDE controller

dev/io_device.cc

@@ -160,8 +160,7 @@ DmaPort::dmaAction(Command cmd, Addr addr, int size, Event *event,
     basePkt.flags = 0;
     basePkt.coherence = NULL;
     basePkt.senderState = NULL;
-    basePkt.src = 0;
-    basePkt.dest = 0;
+    basePkt.dest = Packet::Broadcast;
     basePkt.cmd = cmd;
     basePkt.result = Unknown;
     basePkt.req = NULL;

dev/pciconfigall.cc

@@ -165,6 +165,7 @@ PciConfigAll::write(Packet &pkt)
       default:
         panic("invalid pci config write size\n");
     }
+    pkt.result = Success;
     return pioDelay;
 }