dev-arm: Fix Gicv2 distributor group register

For each bit in GICD_IGROUPR:
value 0 means corresponding irq is group0
value 1 means corresponding irq is group 1.

Change-Id: I15699d4bc89ff3df0e0bdb41154c0d0989dc2f63
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13555
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
This commit is contained in:
Adrien Pesle
2018-10-11 16:09:07 +02:00
committed by Giacomo Travaglini
parent 0f368d5ebd
commit 9181c2ea16

View File

@@ -336,7 +336,7 @@ class GicV2 : public BaseGic, public BaseGicRegisters
bool isGroup0(ContextID ctx, uint32_t int_num) {
const uint32_t group_reg = getIntGroup(ctx, intNumToWord(int_num));
return bits(group_reg, intNumToBit(int_num));
return !bits(group_reg, intNumToBit(int_num));
}
/**