From 8ea5176b7f4eac09d152dd63d0ba07962be9c865 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sat, 27 Sep 2008 21:03:46 -0700 Subject: [PATCH] arch: TheISA shouldn't really ever be used in the arch directory. We should always refer to the specific ISA in that arch directory. This is especially necessary if we're ever going to make it to the point where we actually have heterogeneous systems. --- src/arch/alpha/ev5.cc | 4 ++-- src/arch/alpha/idle_event.cc | 2 +- src/arch/alpha/interrupts.hh | 2 +- src/arch/alpha/linux/threadinfo.hh | 4 ++-- src/arch/alpha/regfile.cc | 2 +- src/arch/alpha/remote_gdb.cc | 26 +++++++++++++------------- src/arch/alpha/stacktrace.cc | 2 +- src/arch/alpha/stacktrace.hh | 2 +- src/arch/alpha/tru64/process.cc | 2 +- src/arch/mips/idle_event.cc | 2 +- src/arch/mips/linux/threadinfo.hh | 4 ++-- src/arch/mips/regfile/misc_regfile.cc | 2 +- src/arch/mips/stacktrace.cc | 2 +- src/arch/mips/stacktrace.hh | 2 +- src/arch/sparc/process.cc | 2 +- src/arch/sparc/regfile.cc | 4 ++-- src/arch/sparc/remote_gdb.cc | 2 +- src/arch/sparc/stacktrace.cc | 2 +- src/arch/sparc/stacktrace.hh | 2 +- src/arch/x86/process.cc | 6 +++--- src/arch/x86/remote_gdb.cc | 2 +- 21 files changed, 39 insertions(+), 39 deletions(-) diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc index 83900349e9..45d2ff5a53 100644 --- a/src/arch/alpha/ev5.cc +++ b/src/arch/alpha/ev5.cc @@ -383,10 +383,10 @@ AlphaISA::MiscRegFile::setIpr(int idx, uint64_t val, ThreadContext *tc) #if FULL_SYSTEM if (val & 0x18) { if (tc->getKernelStats()) - tc->getKernelStats()->mode(TheISA::Kernel::user, tc); + tc->getKernelStats()->mode(AlphaISA::Kernel::user, tc); } else { if (tc->getKernelStats()) - tc->getKernelStats()->mode(TheISA::Kernel::kernel, tc); + tc->getKernelStats()->mode(AlphaISA::Kernel::kernel, tc); } #endif diff --git a/src/arch/alpha/idle_event.cc b/src/arch/alpha/idle_event.cc index f0f1eab7a2..d3807a48d7 100644 --- a/src/arch/alpha/idle_event.cc +++ b/src/arch/alpha/idle_event.cc @@ -33,7 +33,7 @@ #include "arch/alpha/kernel_stats.hh" #include "cpu/thread_context.hh" -using namespace TheISA; +using namespace AlphaISA; void IdleStartEvent::process(ThreadContext *tc) diff --git a/src/arch/alpha/interrupts.hh b/src/arch/alpha/interrupts.hh index 009b416376..1d8ba736fe 100644 --- a/src/arch/alpha/interrupts.hh +++ b/src/arch/alpha/interrupts.hh @@ -78,7 +78,7 @@ class Interrupts { DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index); - if (int_num < 0 || int_num >= TheISA::NumInterruptLevels) + if (int_num < 0 || int_num >= AlphaISA::NumInterruptLevels) panic("int_num out of bounds\n"); if (index < 0 || index >= (int)sizeof(uint64_t) * 8) diff --git a/src/arch/alpha/linux/threadinfo.hh b/src/arch/alpha/linux/threadinfo.hh index b0c8284be5..3ec1aa0982 100644 --- a/src/arch/alpha/linux/threadinfo.hh +++ b/src/arch/alpha/linux/threadinfo.hh @@ -55,7 +55,7 @@ class ThreadInfo CopyOut(tc, &data, addr, sizeof(T)); - data = TheISA::gtoh(data); + data = AlphaISA::gtoh(data); return true; } @@ -76,7 +76,7 @@ class ThreadInfo Addr sp; if (!addr) - addr = tc->readMiscRegNoEffect(TheISA::IPR_PALtemp23); + addr = tc->readMiscRegNoEffect(AlphaISA::IPR_PALtemp23); FunctionalPort *p = tc->getPhysPort(); p->readBlob(addr, (uint8_t *)&sp, sizeof(Addr)); diff --git a/src/arch/alpha/regfile.cc b/src/arch/alpha/regfile.cc index 2653310d77..3faa189ca1 100644 --- a/src/arch/alpha/regfile.cc +++ b/src/arch/alpha/regfile.cc @@ -70,7 +70,7 @@ namespace AlphaISA } // Then loop through the floating point registers. - for (int i = 0; i < TheISA::NumFloatRegs; ++i) { + for (int i = 0; i < AlphaISA::NumFloatRegs; ++i) { dest->setFloatRegBits(i, src->readFloatRegBits(i)); } diff --git a/src/arch/alpha/remote_gdb.cc b/src/arch/alpha/remote_gdb.cc index 8d70ebfa2f..a40d06f183 100644 --- a/src/arch/alpha/remote_gdb.cc +++ b/src/arch/alpha/remote_gdb.cc @@ -140,7 +140,7 @@ #include "sim/system.hh" using namespace std; -using namespace TheISA; +using namespace AlphaISA; RemoteGDB::RemoteGDB(System *_system, ThreadContext *c) : BaseRemoteGDB(_system, c, KGDB_NUMREGS) @@ -161,12 +161,12 @@ RemoteGDB::acc(Addr va, size_t len) #else Addr last_va; - va = TheISA::TruncPage(va); - last_va = TheISA::RoundPage(va + len); + va = AlphaISA::TruncPage(va); + last_va = AlphaISA::RoundPage(va + len); do { - if (TheISA::IsK0Seg(va)) { - if (va < (TheISA::K0SegBase + pmem->size())) { + if (AlphaISA::IsK0Seg(va)) { + if (va < (AlphaISA::K0SegBase + pmem->size())) { DPRINTF(GDBAcc, "acc: Mapping is valid K0SEG <= " "%#x < K0SEG + size\n", va); return true; @@ -188,12 +188,12 @@ RemoteGDB::acc(Addr va, size_t len) return true; Addr ptbr = context->readMiscRegNoEffect(AlphaISA::IPR_PALtemp20); - TheISA::PageTableEntry pte = TheISA::kernel_pte_lookup(context->getPhysPort(), ptbr, va); + AlphaISA::PageTableEntry pte = AlphaISA::kernel_pte_lookup(context->getPhysPort(), ptbr, va); if (!pte.valid()) { DPRINTF(GDBAcc, "acc: %#x pte is invalid\n", va); return false; } - va += TheISA::PageBytes; + va += AlphaISA::PageBytes; } while (va < last_va); DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va); @@ -215,17 +215,17 @@ RemoteGDB::getregs() // @todo: Currently this is very Alpha specific. if (AlphaISA::PcPAL(gdbregs.regs[KGDB_REG_PC])) { - for (int i = 0; i < TheISA::NumIntArchRegs; ++i) { + for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) { gdbregs.regs[i] = context->readIntReg(AlphaISA::reg_redir[i]); } } else { - for (int i = 0; i < TheISA::NumIntArchRegs; ++i) { + for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) { gdbregs.regs[i] = context->readIntReg(i); } } #ifdef KGDB_FP_REGS - for (int i = 0; i < TheISA::NumFloatArchRegs; ++i) { + for (int i = 0; i < AlphaISA::NumFloatArchRegs; ++i) { gdbregs.regs[i + KGDB_REG_F0] = context->readFloatRegBits(i); } #endif @@ -242,17 +242,17 @@ RemoteGDB::setregs() { // @todo: Currently this is very Alpha specific. if (AlphaISA::PcPAL(gdbregs.regs[KGDB_REG_PC])) { - for (int i = 0; i < TheISA::NumIntArchRegs; ++i) { + for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) { context->setIntReg(AlphaISA::reg_redir[i], gdbregs.regs[i]); } } else { - for (int i = 0; i < TheISA::NumIntArchRegs; ++i) { + for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) { context->setIntReg(i, gdbregs.regs[i]); } } #ifdef KGDB_FP_REGS - for (int i = 0; i < TheISA::NumFloatArchRegs; ++i) { + for (int i = 0; i < AlphaISA::NumFloatArchRegs; ++i) { context->setFloatRegBits(i, gdbregs.regs[i + KGDB_REG_F0]); } #endif diff --git a/src/arch/alpha/stacktrace.cc b/src/arch/alpha/stacktrace.cc index 1249497816..b2fa89cb89 100644 --- a/src/arch/alpha/stacktrace.cc +++ b/src/arch/alpha/stacktrace.cc @@ -159,7 +159,7 @@ namespace AlphaISA } SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab; - Addr ksp = tc->readIntReg(TheISA::StackPointerReg); + Addr ksp = tc->readIntReg(AlphaISA::StackPointerReg); Addr bottom = ksp & ~0x3fff; Addr addr; diff --git a/src/arch/alpha/stacktrace.hh b/src/arch/alpha/stacktrace.hh index 834abbc2f6..c028afe2b6 100644 --- a/src/arch/alpha/stacktrace.hh +++ b/src/arch/alpha/stacktrace.hh @@ -62,7 +62,7 @@ namespace AlphaISA class StackTrace { protected: - typedef TheISA::MachInst MachInst; + typedef AlphaISA::MachInst MachInst; private: ThreadContext *tc; std::vector stack; diff --git a/src/arch/alpha/tru64/process.cc b/src/arch/alpha/tru64/process.cc index 5f448489e5..455a245841 100644 --- a/src/arch/alpha/tru64/process.cc +++ b/src/arch/alpha/tru64/process.cc @@ -166,7 +166,7 @@ SyscallReturn tableFunc(SyscallDesc *desc, int callnum, LiveProcess *process, ThreadContext *tc) { using namespace std; - using namespace TheISA; + using namespace AlphaISA; int id = tc->getSyscallArg(0); // table ID int index = tc->getSyscallArg(1); // index into table diff --git a/src/arch/mips/idle_event.cc b/src/arch/mips/idle_event.cc index d1d4f7c637..0aea08834b 100644 --- a/src/arch/mips/idle_event.cc +++ b/src/arch/mips/idle_event.cc @@ -34,7 +34,7 @@ #include "arch/mips/kernel_stats.hh" #include "cpu/thread_context.hh" -using namespace TheISA; +using namespace MipsISA; void IdleStartEvent::process(ThreadContext *tc) diff --git a/src/arch/mips/linux/threadinfo.hh b/src/arch/mips/linux/threadinfo.hh index 25ee74dd3a..b0d0cd811e 100644 --- a/src/arch/mips/linux/threadinfo.hh +++ b/src/arch/mips/linux/threadinfo.hh @@ -55,7 +55,7 @@ class ThreadInfo CopyOut(tc, &data, addr, sizeof(T)); - data = TheISA::gtoh(data); + data = MipsISA::gtoh(data); return true; } @@ -77,7 +77,7 @@ class ThreadInfo Addr sp; if (!addr) - addr = tc->readMiscRegNoEffect(0/*TheISA::IPR_PALtemp23*/); + addr = tc->readMiscRegNoEffect(0/*MipsISA::IPR_PALtemp23*/); FunctionalPort *p = tc->getPhysPort(); p->readBlob(addr, (uint8_t *)&sp, sizeof(Addr)); diff --git a/src/arch/mips/regfile/misc_regfile.cc b/src/arch/mips/regfile/misc_regfile.cc index b82a94103a..e81f940f55 100755 --- a/src/arch/mips/regfile/misc_regfile.cc +++ b/src/arch/mips/regfile/misc_regfile.cc @@ -186,7 +186,7 @@ MiscRegFile::reset(std::string core_name, unsigned num_threads, num_threads, num_vpes); cpu = _cpu; - TheISA::CoreSpecific &cp = cpu->coreParams; + MipsISA::CoreSpecific &cp = cpu->coreParams; // Do Default CP0 initialization HERE diff --git a/src/arch/mips/stacktrace.cc b/src/arch/mips/stacktrace.cc index 482d264e8d..04a9a0f18d 100644 --- a/src/arch/mips/stacktrace.cc +++ b/src/arch/mips/stacktrace.cc @@ -159,7 +159,7 @@ StackTrace::trace(ThreadContext *_tc, bool is_call) // } // SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab; -// Addr ksp = tc->readIntReg(TheISA::StackPointerReg); +// Addr ksp = tc->readIntReg(MipsISA::StackPointerReg); // Addr bottom = ksp & ~0x3fff; // Addr addr; diff --git a/src/arch/mips/stacktrace.hh b/src/arch/mips/stacktrace.hh index e2424523ff..4c02cc86ca 100644 --- a/src/arch/mips/stacktrace.hh +++ b/src/arch/mips/stacktrace.hh @@ -61,7 +61,7 @@ class ProcessInfo class StackTrace { protected: - typedef TheISA::MachInst MachInst; + typedef MipsISA::MachInst MachInst; private: ThreadContext *tc; std::vector stack; diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc index 6e490e05eb..a8fda04eb1 100644 --- a/src/arch/sparc/process.cc +++ b/src/arch/sparc/process.cc @@ -354,7 +354,7 @@ SparcLiveProcess::argsInit(int pageSize) // figure out argc IntType argc = argv.size(); - IntType guestArgc = TheISA::htog(argc); + IntType guestArgc = SparcISA::htog(argc); //Write out the sentry void * uint64_t sentry_NULL = 0; diff --git a/src/arch/sparc/regfile.cc b/src/arch/sparc/regfile.cc index d6be52424e..76516daca2 100644 --- a/src/arch/sparc/regfile.cc +++ b/src/arch/sparc/regfile.cc @@ -366,12 +366,12 @@ void SparcISA::copyMiscRegs(ThreadContext *src, ThreadContext *dest) void SparcISA::copyRegs(ThreadContext *src, ThreadContext *dest) { // First loop through the integer registers. - for (int i = 0; i < TheISA::NumIntRegs; ++i) { + for (int i = 0; i < SparcISA::NumIntRegs; ++i) { dest->setIntReg(i, src->readIntReg(i)); } // Then loop through the floating point registers. - for (int i = 0; i < TheISA::NumFloatRegs; ++i) { + for (int i = 0; i < SparcISA::NumFloatRegs; ++i) { dest->setFloatRegBits(i, src->readFloatRegBits(i)); } diff --git a/src/arch/sparc/remote_gdb.cc b/src/arch/sparc/remote_gdb.cc index ef30bd8080..615c5b5516 100644 --- a/src/arch/sparc/remote_gdb.cc +++ b/src/arch/sparc/remote_gdb.cc @@ -137,7 +137,7 @@ #include "sim/system.hh" using namespace std; -using namespace TheISA; +using namespace SparcISA; RemoteGDB::RemoteGDB(System *_system, ThreadContext *c) : BaseRemoteGDB(_system, c, NumGDBRegs), nextBkpt(0) diff --git a/src/arch/sparc/stacktrace.cc b/src/arch/sparc/stacktrace.cc index 8ec1d36c88..3ab0edb57a 100644 --- a/src/arch/sparc/stacktrace.cc +++ b/src/arch/sparc/stacktrace.cc @@ -159,7 +159,7 @@ namespace SparcISA } SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab; - Addr ksp = tc->readIntReg(TheISA::StackPointerReg); + Addr ksp = tc->readIntReg(SparcISA::StackPointerReg); Addr bottom = ksp & ~0x3fff; Addr addr; diff --git a/src/arch/sparc/stacktrace.hh b/src/arch/sparc/stacktrace.hh index 4bc5d779b1..929990fcbe 100644 --- a/src/arch/sparc/stacktrace.hh +++ b/src/arch/sparc/stacktrace.hh @@ -61,7 +61,7 @@ namespace SparcISA class StackTrace { protected: - typedef TheISA::MachInst MachInst; + typedef SparcISA::MachInst MachInst; private: ThreadContext *tc; std::vector stack; diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc index 76f0b5d04c..b62efd3cdd 100644 --- a/src/arch/x86/process.cc +++ b/src/arch/x86/process.cc @@ -105,8 +105,8 @@ using namespace X86ISA; M5_64_auxv_t::M5_64_auxv_t(int64_t type, int64_t val) { - a_type = TheISA::htog(type); - a_val = TheISA::htog(val); + a_type = X86ISA::htog(type); + a_val = X86ISA::htog(val); } X86LiveProcess::X86LiveProcess(LiveProcessParams * params, @@ -424,7 +424,7 @@ X86LiveProcess::argsInit(int intSize, int pageSize) // figure out argc uint64_t argc = argv.size(); - uint64_t guestArgc = TheISA::htog(argc); + uint64_t guestArgc = X86ISA::htog(argc); //Write out the sentry void * uint64_t sentry_NULL = 0; diff --git a/src/arch/x86/remote_gdb.cc b/src/arch/x86/remote_gdb.cc index 3a024e0879..c416042c89 100644 --- a/src/arch/x86/remote_gdb.cc +++ b/src/arch/x86/remote_gdb.cc @@ -157,7 +157,7 @@ #include "cpu/thread_context.hh" using namespace std; -using namespace TheISA; +using namespace X86ISA; RemoteGDB::RemoteGDB(System *_system, ThreadContext *c) : BaseRemoteGDB(_system, c, NumGDBRegs)