From 8c48ba92075843702c7bd09596ac57f350591ec3 Mon Sep 17 00:00:00 2001 From: Ayaz Akram Date: Tue, 22 Jun 2021 01:47:43 -0700 Subject: [PATCH] arch-riscv: update all pmp rules on pmp addr update Update in a pmp addr register can have effect on other pmp rules, for example if TOR mode is used. According to specs, update in a pmp entry is made using an update to a pmpaddr reg, followed by an update to pmpcfg reg which should be followed by sfence.vma. Currently, in gem5 update in cfg register (combination of 8 pmpcfg regs.), which should happen after a pmpaddr reg. update, leads to an update in all pmp rules. However, there seems to be a case where we receive an interrupt right before execution of an instruction to update cfg register, which leads to unindented side-effects of S mode addresses falsely falling into a wrong pmp region. Updating pmp rules right after pmpaddr update, might be redundant, but should not break anything otherwise. Change-Id: I3776ee6ba40e1249c98d11076a2d176de40a957e Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47059 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- src/arch/riscv/pmp.cc | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/arch/riscv/pmp.cc b/src/arch/riscv/pmp.cc index e9fcb7b90e..c0e53bfb0e 100644 --- a/src/arch/riscv/pmp.cc +++ b/src/arch/riscv/pmp.cc @@ -204,7 +204,9 @@ PMP::pmpUpdateAddr(uint32_t pmp_index, Addr this_addr) // will convert it into a range, once cfg // reg is written pmpTable[pmp_index].rawAddr = this_addr; - pmpUpdateRule(pmp_index); + for (int index = 0; index < pmpEntries; index++) { + pmpUpdateRule(index); + } } bool