From 6374697a20dc8fc5f34458d27c2826ddc9a413a4 Mon Sep 17 00:00:00 2001
From: Daniel Kouchekinia <kouchekinia@wisc.edu>
Date: Thu, 8 Feb 2024 21:13:19 -0600
Subject: [PATCH] mem-ruby: Add missing transition for SLC writes to VIPER TCC

Bypassed write though requests on invalid lines in the TCC should be
written though to the directory. This transition was previously
missing.

Change-Id: I16b117c4e085ce6be0ed5297aa0129d52cd35a51
---
 src/mem/ruby/protocol/GPU_VIPER-TCC.sm | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mem/ruby/protocol/GPU_VIPER-TCC.sm b/src/mem/ruby/protocol/GPU_VIPER-TCC.sm
index e599d2f937..fa69e03987 100644
--- a/src/mem/ruby/protocol/GPU_VIPER-TCC.sm
+++ b/src/mem/ruby/protocol/GPU_VIPER-TCC.sm
@@ -1106,7 +1106,7 @@ machine(MachineType:TCC, "TCC Cache")
     st_stallAndWaitRequest;
   }
 
-  transition(I, WrVicBlk) {TagArrayRead} {
+  transition(I, {WrVicBlk, WrVicBlkEvict}) {TagArrayRead} {
     p_profileMiss;
     wt_writeThrough;
     p_popRequestQueue;