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arch, cpu: Remove float type accessors.

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Use the binary accessors instead.

Change-Id: Iff1877e92c79df02b3d13635391a8c2f025776a2
Reviewed-on: https://gem5-review.googlesource.com/c/14457
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
This commit is contained in:
Gabe Black
2018-11-19 17:20:31 -08:00
parent 67d58e8182
commit 88bbabe93f
21 changed files with 17 additions and 247 deletions
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20
src/cpu/o3/thread_context_impl.hh
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@@ -199,18 +199,11 @@ O3ThreadContext<Impl>::readIntRegFlat(int reg_idx)
return cpu->readArchIntReg(reg_idx, thread->threadId());
}
template <class Impl>
TheISA::FloatReg
O3ThreadContext<Impl>::readFloatRegFlat(int reg_idx)
{
return cpu->readArchFloatReg(reg_idx, thread->threadId());
}
template <class Impl>
TheISA::FloatRegBits
O3ThreadContext<Impl>::readFloatRegBitsFlat(int reg_idx)
{
return cpu->readArchFloatRegInt(reg_idx, thread->threadId());
return cpu->readArchFloatRegBits(reg_idx, thread->threadId());
}
template <class Impl>
@@ -251,20 +244,11 @@ O3ThreadContext<Impl>::setIntRegFlat(int reg_idx, uint64_t val)
conditionalSquash();
}
template <class Impl>
void
O3ThreadContext<Impl>::setFloatRegFlat(int reg_idx, FloatReg val)
{
cpu->setArchFloatReg(reg_idx, val, thread->threadId());
conditionalSquash();
}
template <class Impl>
void
O3ThreadContext<Impl>::setFloatRegBitsFlat(int reg_idx, FloatRegBits val)
{
cpu->setArchFloatRegInt(reg_idx, val, thread->threadId());
cpu->setArchFloatRegBits(reg_idx, val, thread->threadId());
conditionalSquash();
}