arch, cpu: Remove float type accessors.

Use the binary accessors instead.

Change-Id: Iff1877e92c79df02b3d13635391a8c2f025776a2
Reviewed-on: https://gem5-review.googlesource.com/c/14457
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
This commit is contained in:
Gabe Black
2018-11-19 17:20:31 -08:00
parent 67d58e8182
commit 88bbabe93f
21 changed files with 17 additions and 247 deletions

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@@ -88,7 +88,7 @@ zeroRegisters(CPU *cpu)
// (no longer very clean due to the change in setIntReg() in the
// cpu model. Consider changing later.)
cpu->thread->setIntReg(ZeroReg, 0);
cpu->thread->setFloatReg(ZeroReg, 0.0);
cpu->thread->setFloatRegBits(ZeroReg, 0);
}
////////////////////////////////////////////////////////////////////////

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@@ -235,7 +235,7 @@ TarmacTracerRecord::TraceRegEntry::updateFloat(
regValid = true;
regName = "f" + std::to_string(regRelIdx);
valueLo = thread->readFloatReg(regRelIdx);
valueLo = bitsToFloat32(thread->readFloatRegBits(regRelIdx));
}
void

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@@ -152,7 +152,7 @@ copyRegs(ThreadContext *src, ThreadContext *dest)
dest->setIntRegFlat(i, src->readIntRegFlat(i));
for (int i = 0; i < NumFloatRegs; i++)
dest->setFloatRegFlat(i, src->readFloatRegFlat(i));
dest->setFloatRegBitsFlat(i, src->readFloatRegBitsFlat(i));
for (int i = 0; i < NumVecRegs; i++)
dest->setVecRegFlat(i, src->readVecRegFlat(i));

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@@ -225,7 +225,7 @@ zeroRegisters(CPU *cpu)
// (no longer very clean due to the change in setIntReg() in the
// cpu model. Consider changing later.)
cpu->thread->setIntReg(ZeroReg, 0);
cpu->thread->setFloatReg(ZeroReg, 0.0);
cpu->thread->setFloatRegBits(ZeroReg, 0);
}
void
@@ -247,7 +247,7 @@ copyRegs(ThreadContext *src, ThreadContext *dest)
// Then loop through the floating point registers.
for (int i = 0; i < NumFloatRegs; i++)
dest->setFloatRegFlat(i, src->readFloatRegFlat(i));
dest->setFloatRegBitsFlat(i, src->readFloatRegBitsFlat(i));
// Would need to add condition-code regs if implemented
assert(NumCCRegs == 0);