diff --git a/src/arch/alpha/decoder.hh b/src/arch/alpha/decoder.hh
index 522359c285..0ee425077f 100644
--- a/src/arch/alpha/decoder.hh
+++ b/src/arch/alpha/decoder.hh
@@ -66,7 +66,7 @@ class Decoder
     void
     moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
     {
-        ext_inst = inst;
+        ext_inst = letoh(inst);
         instDone = true;
         if (FullSystem)
             ext_inst |= (static_cast<ExtMachInst>(pc.pc() & 0x1) << 32);
diff --git a/src/arch/arm/decoder.cc b/src/arch/arm/decoder.cc
index 4c86ee2c69..a2c504334a 100644
--- a/src/arch/arm/decoder.cc
+++ b/src/arch/arm/decoder.cc
@@ -154,7 +154,7 @@ Decoder::consumeBytes(int numBytes)
 void
 Decoder::moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
 {
-    data = inst;
+    data = letoh(inst);
     offset = (fetchPC >= pc.instAddr()) ? 0 : pc.instAddr() - fetchPC;
     emi.thumb = pc.thumb();
     emi.aarch64 = pc.aarch64();
diff --git a/src/arch/mips/decoder.hh b/src/arch/mips/decoder.hh
index 4a2fc46a5f..825ab8adad 100644
--- a/src/arch/mips/decoder.hh
+++ b/src/arch/mips/decoder.hh
@@ -68,7 +68,7 @@ class Decoder
     void
     moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
     {
-        emi = inst;
+        emi = letoh(inst);
         instDone = true;
     }
 
diff --git a/src/arch/power/decoder.hh b/src/arch/power/decoder.hh
index cc086adc55..56273f8db2 100644
--- a/src/arch/power/decoder.hh
+++ b/src/arch/power/decoder.hh
@@ -67,7 +67,7 @@ class Decoder
     void
     moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
     {
-        emi = inst;
+        emi = betoh(inst);
         instDone = true;
     }
 
diff --git a/src/arch/riscv/decoder.cc b/src/arch/riscv/decoder.cc
index 41a52020eb..69c3921942 100644
--- a/src/arch/riscv/decoder.cc
+++ b/src/arch/riscv/decoder.cc
@@ -52,6 +52,7 @@ void Decoder::reset()
 void
 Decoder::moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
 {
+    inst = letoh(inst);
     DPRINTF(Decode, "Requesting bytes 0x%08x from address %#x\n", inst,
             fetchPC);
 
diff --git a/src/arch/sparc/decoder.hh b/src/arch/sparc/decoder.hh
index 6fa506f37a..8124a69634 100644
--- a/src/arch/sparc/decoder.hh
+++ b/src/arch/sparc/decoder.hh
@@ -65,7 +65,7 @@ class Decoder
     void
     moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
     {
-        emi = inst;
+        emi = betoh(inst);
         // The I bit, bit 13, is used to figure out where the ASI
         // should come from. Use that in the ExtMachInst. This is
         // slightly redundant, but it removes the need to put a condition
diff --git a/src/arch/x86/decoder.hh b/src/arch/x86/decoder.hh
index 412b7c73f6..064fd3a80c 100644
--- a/src/arch/x86/decoder.hh
+++ b/src/arch/x86/decoder.hh
@@ -310,7 +310,7 @@ class Decoder
         DPRINTF(Decoder, "Getting more bytes.\n");
         basePC = fetchPC;
         offset = (fetchPC >= pc.instAddr()) ? 0 : pc.instAddr() - fetchPC;
-        fetchChunk = data;
+        fetchChunk = letoh(data);
         outOfBytes = false;
         process();
     }
diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh
index 9e4bdcd529..fce4a9fc36 100644
--- a/src/cpu/checker/cpu_impl.hh
+++ b/src/cpu/checker/cpu_impl.hh
@@ -285,7 +285,6 @@ Checker<Impl>::verify(const DynInstPtr &completed_inst)
 
                     pkt->dataStatic(&machInst);
                     icachePort->sendFunctional(pkt);
-                    machInst = gtoh(machInst);
 
                     delete pkt;
                 }
diff --git a/src/cpu/minor/fetch2.cc b/src/cpu/minor/fetch2.cc
index d60a1bab01..f047d6816f 100644
--- a/src/cpu/minor/fetch2.cc
+++ b/src/cpu/minor/fetch2.cc
@@ -376,12 +376,10 @@ Fetch2::evaluate()
             } else {
                 uint8_t *line = line_in->line;
 
-                TheISA::MachInst inst_word;
                 /* The instruction is wholly in the line, can just
                  *  assign */
-                inst_word = TheISA::gtoh(
-                    *(reinterpret_cast<TheISA::MachInst *>
-                    (line + fetch_info.inputIndex)));
+                auto inst_word = *reinterpret_cast<TheISA::MachInst *>
+                                  (line + fetch_info.inputIndex);
 
                 if (!decoder->instReady()) {
                     decoder->moreBytes(fetch_info.pc,
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 60542b8243..47b1ad0c5a 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -1285,8 +1285,7 @@ DefaultFetch<Impl>::fetch(bool &status_change)
                 break;
             }
 
-            MachInst inst = TheISA::gtoh(cacheInsts[blkOffset]);
-            decoder[tid]->moreBytes(thisPC, fetchAddr, inst);
+            decoder[tid]->moreBytes(thisPC, fetchAddr, cacheInsts[blkOffset]);
 
             if (decoder[tid]->needMoreBytes()) {
                 blkOffset++;
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 3000fae530..566533c731 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -503,8 +503,6 @@ BaseSimpleCPU::preExecute()
     thread->comInstEventQueue.serviceEvents(t_info.numInst);
 
     // decode the instruction
-    inst = gtoh(inst);
-
     TheISA::PCState pcState = thread->pcState();
 
     if (isRomMicroPC(pcState.microPC())) {