cpu: Formalize a CPU cluster class in the gem5 standard library

Currently the gem5 standard library does not define a class to represent
a cluster of CPUs.
The SubSystem class has been extended in some python modules [1] to
define clock/voltage domains shared by a group of CPUs (the cluster),
and to provide some utility functions for top level configs.

This patch is moving the aforementioned class within the gem5 standard
library, to let other ISAs and scripts make use of it.

Adding a cpu cluster class to the gem5 library will have the
benefit of standardizing the interface to cpus in the toplevel
configs

Most of the new class still resides in the python world: we want the
class to be as generic as possible and we want to make its use
optional

[1]: https://github.com/gem5/gem5/blob/v22.0.0.0/\
    configs/example/arm/devices.py#L96

Change-Id: Idb05263a244e28bffa9eac811c6deb62ebb76a74
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65891
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/cpu/SConscript

@@ -93,6 +93,7 @@ Source('inst_pb_trace.cc', tags='protobuf')
 SimObject('CheckerCPU.py', sim_objects=['CheckerCPU'])
 
 SimObject('BaseCPU.py', sim_objects=['BaseCPU'])
+SimObject('CpuCluster.py', sim_objects=['CpuCluster'])
 SimObject('CPUTracers.py', sim_objects=[
     'ExeTracer', 'IntelTrace', 'NativeTrace'])
 SimObject('TimingExpr.py', sim_objects=[