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arch-vega: Multiple SOPC fixes (#1366)

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Make S_CMP_LT_U32 use < instead of <=. Change types of EQ / LG for U64
to be U64.

Change-Id: Ib0b3b7a46ba1aff16a6d439302ca087d988d6417
This commit is contained in:
Matthew Poremba
2024-07-23 12:45:52 -07:00
committed by GitHub
parent e7d1c90aeb
commit 7dae1a1d25
1 changed files with 5 additions and 5 deletions
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10
src/arch/amdgpu/vega/insts/sopc.cc
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@@ -368,7 +368,7 @@ namespace VegaISA
src0.read();
src1.read();
scc = (src0.rawData() <= src1.rawData()) ? 1 : 0;
scc = (src0.rawData() < src1.rawData()) ? 1 : 0;
scc.write();
} // execute
@@ -556,8 +556,8 @@ namespace VegaISA
void
Inst_SOPC__S_CMP_EQ_U64::execute(GPUDynInstPtr gpuDynInst)
{
ConstScalarOperandI64 src0(gpuDynInst, instData.SSRC0);
ConstScalarOperandI64 src1(gpuDynInst, instData.SSRC1);
ConstScalarOperandU64 src0(gpuDynInst, instData.SSRC0);
ConstScalarOperandU64 src1(gpuDynInst, instData.SSRC1);
ScalarOperandU32 scc(gpuDynInst, REG_SCC);
src0.read();
@@ -584,8 +584,8 @@ namespace VegaISA
void
Inst_SOPC__S_CMP_LG_U64::execute(GPUDynInstPtr gpuDynInst)
{
ConstScalarOperandI64 src0(gpuDynInst, instData.SSRC0);
ConstScalarOperandI64 src1(gpuDynInst, instData.SSRC1);
ConstScalarOperandU64 src0(gpuDynInst, instData.SSRC0);
ConstScalarOperandU64 src1(gpuDynInst, instData.SSRC1);
ScalarOperandU32 scc(gpuDynInst, REG_SCC);
src0.read();