From 7be718a6ef4e9201990e813b5a7fa7965be295a1 Mon Sep 17 00:00:00 2001
From: Giacomo Travaglini <giacomo.travaglini@arm.com>
Date: Wed, 14 Apr 2021 10:06:23 +0100
Subject: [PATCH] dev: Fix GCN3_X86 builds on aarch64 host

Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: Ic826f0cb46e07b9b5135eee1e518bc13f3d978a1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44485
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45823
---
 src/dev/hsa/hsa.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/dev/hsa/hsa.h b/src/dev/hsa/hsa.h
index f7d15ba7e5..1c1f34083e 100644
--- a/src/dev/hsa/hsa.h
+++ b/src/dev/hsa/hsa.h
@@ -80,7 +80,7 @@
 // Try to detect CPU endianness
 #if !defined(LITTLEENDIAN_CPU) && !defined(BIGENDIAN_CPU)
 #if defined(__i386__) || defined(__x86_64__) || defined(_M_IX86) || \
-    defined(_M_X64)
+    defined(_M_X64) || defined(__aarch64__)
 #define LITTLEENDIAN_CPU
 #endif
 #endif