From 7b91521c605be23ea512d4e59b6cd1ac95a087a0 Mon Sep 17 00:00:00 2001
From: Giacomo Travaglini <giacomo.travaglini@arm.com>
Date: Fri, 14 Apr 2023 11:02:07 +0100
Subject: [PATCH] arch-arm: Define a AA64ZFR0 data type

Change-Id: I6b0dcf0c1882f356783934f625c2bc3a25fbb885
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/70725
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
---
 src/arch/arm/regs/misc_types.hh | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/src/arch/arm/regs/misc_types.hh b/src/arch/arm/regs/misc_types.hh
index 214d4180d3..b7a1207cf5 100644
--- a/src/arch/arm/regs/misc_types.hh
+++ b/src/arch/arm/regs/misc_types.hh
@@ -203,6 +203,19 @@ namespace ArmISA
         Bitfield<3, 0> el0;
     EndBitUnion(AA64PFR0)
 
+    BitUnion64(AA64ZFR0)
+        Bitfield<59, 56> f64mm;
+        Bitfield<55, 52> f32mm;
+        Bitfield<47, 44> i8mm;
+        Bitfield<43, 40> sm4;
+        Bitfield<35, 32> sha3;
+        Bitfield<27, 24> b16b16;
+        Bitfield<23, 20> bf16;
+        Bitfield<19, 16> bitPerm;
+        Bitfield<7, 4> aes;
+        Bitfield<3, 0> sveVer;
+    EndBitUnion(AA64ZFR0)
+
     BitUnion64(AA64SMFR0)
         Bitfield<63> fa64;
         Bitfield<59, 56> smEver;