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tlb: Don't separate the TLB classes into an instruction TLB and a data TLB

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This commit is contained in:
Gabe Black
2009-04-08 22:21:27 -07:00
parent 08043c777f
commit 7b5a96f06b
34 changed files with 309 additions and 600 deletions
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2
src/cpu/simple/atomic.cc
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@@ -609,7 +609,7 @@ AtomicSimpleCPU::tick()
bool fromRom = isRomMicroPC(thread->readMicroPC());
if (!fromRom && !curMacroStaticInst) {
setupFetchRequest(&ifetch_req);
fault = thread->itb->translateAtomic(&ifetch_req, tc);
fault = thread->itb->translateAtomic(&ifetch_req, tc, false, true);
}
if (fault == NoFault) {

2
src/cpu/simple/timing.cc
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@@ -672,7 +672,7 @@ TimingSimpleCPU::fetch()
ifetch_req->setThreadContext(_cpuId, /* thread ID */ 0);
setupFetchRequest(ifetch_req);
thread->itb->translateTiming(ifetch_req, tc,
&fetchTranslation);
&fetchTranslation, false, true);
} else {
_status = IcacheWaitResponse;
completeIfetch(NULL);

6
src/cpu/simple/timing.hh
View File

@@ -106,7 +106,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
{}
void finish(Fault fault, RequestPtr req,
ThreadContext *tc, bool write)
ThreadContext *tc, bool write, bool execute)
{
cpu->sendFetch(fault, req, tc);
}
@@ -129,7 +129,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
void
finish(Fault fault, RequestPtr req,
ThreadContext *tc, bool write)
ThreadContext *tc, bool write, bool execute)
{
cpu->sendData(fault, req, data, res, read);
delete this;
@@ -173,7 +173,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
void
finish(Fault fault, RequestPtr req,
ThreadContext *tc, bool write)
ThreadContext *tc, bool write, bool execute)
{
assert(state);
assert(state->outstanding);