diff --git a/src/cpu/o3/O3CPU.py b/src/cpu/o3/O3CPU.py
index fd031148d9..7cbb5683f4 100644
--- a/src/cpu/o3/O3CPU.py
+++ b/src/cpu/o3/O3CPU.py
@@ -178,7 +178,7 @@ class O3CPU(BaseCPU):
 
     def addCheckerCpu(self):
         if buildEnv['TARGET_ISA'] in ['arm']:
-            from m5.objects.ArmTLB import ArmMMU
+            from m5.objects.ArmMMU import ArmMMU
 
             self.checker = O3Checker(workload=self.workload,
                                      exitOnError=False,