diff --git a/src/arch/arm/isa/insts/data64.isa b/src/arch/arm/isa/insts/data64.isa
index 02ea53881d..9975664dd8 100644
--- a/src/arch/arm/isa/insts/data64.isa
+++ b/src/arch/arm/isa/insts/data64.isa
@@ -525,11 +525,9 @@ let {{
            EA = XBase;
            faultAddr = EA;
            HCR hcr = Hcr64;
-           SCR scr = Scr64;
            CPSR cpsr = Cpsr;
            ExceptionLevel el = (ExceptionLevel) (uint8_t) cpsr.el;
-           if (el == EL1 && ArmSystem::haveEL(xc->tcBase(), EL2) &&
-               hcr.vm && (scr.ns || !ArmSystem::haveEL(xc->tcBase(), EL3))) {
+           if (el == EL1 && EL2Enabled(xc->tcBase()) && hcr.vm) {
                memAccessFlags = memAccessFlags | Request::CLEAN;
            }
            System *sys = xc->tcBase()->getSystemPtr();