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fixed mapping of device memory and i/o space

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--HG--
extra : convert_revision : 9236c7f0aeb4d555880bdfdfa7f55cedf1cbb950
This commit is contained in:
Ali Saidi
2004-02-05 15:12:33 -05:00
parent 09c40bfe43
commit 77a30ed48d
2 changed files with 30 additions and 5 deletions
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28
dev/pcidev.cc
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@@ -47,6 +47,7 @@
#include "sim/builder.hh"
#include "sim/param.hh"
#include "sim/universe.hh"
#include "dev/tsunamireg.h"
using namespace std;
@@ -176,21 +177,38 @@ PciDev::WriteConfig(int offset, int size, uint32_t data)
if(config.data[offset] & 0x1) {
*(uint32_t *)&config.data[offset] = (word_value & ~0x3) |
(config.data[offset] & 0x3);
if (word_value) {
if (word_value & ~0x1) {
// It's never been set
if (BARAddrs[barnum] == 0)
AddMapping(word_value, BARSize[barnum]-1, MMU);
AddMapping((word_value & ~0x1) + TSUNAMI_PCI0_IO,
BARSize[barnum]-1, MMU);
else
ChangeMapping(BARAddrs[barnum], BARSize[barnum]-1,
word_value, BARSize[barnum]-1, MMU);
BARAddrs[barnum] = word_value;
(word_value & ~0x1) + TSUNAMI_PCI0_IO,
BARSize[barnum]-1, MMU);
BARAddrs[barnum] = (word_value & ~0x1) + TSUNAMI_PCI0_IO;
}
} else {
// This is memory space, bottom four bits are read only
*(uint32_t *)&config.data[offset] = (word_value & ~0xF) |
(config.data[offset] & 0xF);
}
if (word_value & ~0x3) {
// It's never been set
if (BARAddrs[barnum] == 0)
AddMapping((word_value & ~0x3) + TSUNAMI_PCI0_MEMORY,
BARSize[barnum]-1, MMU);
else
ChangeMapping(BARAddrs[barnum], BARSize[barnum]-1,
(word_value & ~0x3) +
TSUNAMI_PCI0_MEMORY,
BARSize[barnum]-1, MMU);
BARAddrs[barnum] = (word_value & ~0x3) +
TSUNAMI_PCI0_MEMORY;
}
}
}
break;