arch-arm, cpu: fix ARM ubsan build on GCC 7.4.0

In src/cpu/reg_class.hh, numPinnedWrites was unset because the
constructors were not well factored out.

Change-Id: Ib2fc8d34a1adf5c48826d257a31dd24dfa64a08a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20048
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Ciro Santilli
2019-07-23 10:32:52 +01:00
parent acad54cf4e
commit 76358df574
3 changed files with 17 additions and 12 deletions

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2018 ARM Limited
* Copyright (c) 2016-2019 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -88,21 +88,21 @@ class RegId {
friend struct std::hash<RegId>;
public:
RegId() : regClass(IntRegClass), regIdx(0), elemIdx(-1) {}
RegId() : RegId(IntRegClass, 0) {}
RegId(RegClass reg_class, RegIndex reg_idx)
: regClass(reg_class), regIdx(reg_idx), elemIdx(-1),
numPinnedWrites(0)
{
panic_if(regClass == VecElemClass,
"Creating vector physical index w/o element index");
}
: RegId(reg_class, reg_idx, ILLEGAL_ELEM_INDEX) {}
explicit RegId(RegClass reg_class, RegIndex reg_idx, ElemIndex elem_idx)
: regClass(reg_class), regIdx(reg_idx), elemIdx(elem_idx),
numPinnedWrites(0)
{
panic_if(regClass != VecElemClass,
"Creating non-vector physical index w/ element index");
numPinnedWrites(0) {
if (elemIdx == ILLEGAL_ELEM_INDEX) {
panic_if(regClass == VecElemClass,
"Creating vector physical index w/o element index");
} else {
panic_if(regClass != VecElemClass,
"Creating non-vector physical index w/ element index");
}
}
bool operator==(const RegId& that) const {