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system-arm: Add aarch64 bootloader support for GICv3

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Change-Id: If75262709868cc59d320f60273a32397339f1dd5
Signed-off-by: Jairo Balart <jairo.balart@metempsy.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13435
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
This commit is contained in:
Jairo Balart
2018-10-11 16:03:24 +02:00
parent dcc15d6d07
commit 761a5806fb
3 changed files with 34 additions and 1 deletions
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29
system/arm/aarch64_bootloader/boot.S
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@@ -67,6 +67,34 @@ _start:
// Test the the MPIDR_EL1 register against 0xff00ffffff to
// extract the primary CPU.
ldr x1, =0xff00ffffff
#ifdef GICV3
and x2, x0, #0xff // use Aff0 as cpuid for now...
tst x0, x1 // check for cpuid==zero
b.ne 1f // secondary CPU
ldr x1, =GIC_DIST_BASE // GICD_CTLR
mov w0, #7 // EnableGrp0 | EnableGrp1NS | EnableGrp1S
str w0, [x1]
1: ldr x1, =GIC_REDIST_BASE + 0x10000 + 0x80 // GICR_IGROUPR0
// 128K for each redistributor, 256K strided...
mov x3, #1 << 18 // GICv4
mul x3, x3, x2
add x1, x1, x3
mov w0, #~0 // Grp1 interrupts
str w0, [x1], #4
b.ne 2f // Only local interrupts for secondary CPUs
ldr x1, =GIC_DIST_BASE + 0x84 // GICD_IGROUPR
str w0, [x1], #4
str w0, [x1], #4
str w0, [x1], #4
2: mov x0, #1
msr S3_0_c12_c12_6, x0 // ICC_IGRPEN0_EL1 Enable
msr S3_0_C12_C12_7, x0 // ICC_IGRPEN1_EL1 Enable
#else
tst x0, x1 // check for cpuid==zero
b.ne 1f // secondary CPU
@@ -88,6 +116,7 @@ _start:
mov w0, #1 << 7 // allow NS access to GICC_PMR
str w0, [x1, #4] // GICC_PMR
#endif
msr sctlr_el2, xzr

5
system/arm/aarch64_bootloader/makefile
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@@ -1,4 +1,7 @@
build:
aarch64-linux-gnu-gcc -c -DPHYS_OFFSET=0x80000000 -DCNTFRQ=0x01800000 -DUART_BASE=0x1c090000 -DSYSREGS_BASE=0x1c010000 -DGIC_DIST_BASE=0x2c001000 -DGIC_CPU_BASE=0x2c002000 -Dkernel=0x80080000 -Dmbox=0x8000fff8 -Ddtb=0x80000100 -o boot_emm.o -march=armv8-a boot.S
aarch64-linux-gnu-ld -o boot_emm.arm64 -N -Ttext 0x00000010 boot_emm.o -non_shared -static
rm boot_emm.o
rm boot_emm.o
aarch64-linux-gnu-gcc -c -DGICV3 -DPHYS_OFFSET=0x80000000 -DCNTFRQ=0x01800000 -DUART_BASE=0x1c090000 -DSYSREGS_BASE=0x1c010000 -DGIC_DIST_BASE=0x2c000000 -DGIC_REDIST_BASE=0x2c010000 -Dkernel=0x80080000 -Dmbox=0x8000fff8 -Ddtb=0x80000100 -o boot_emm_v2.o -march=armv8-a boot.S
aarch64-linux-gnu-ld -o boot_emm_v2.arm64 -N -Ttext 0x00000010 boot_emm_v2.o -non_shared -static
rm boot_emm_v2.o