diff --git a/.github/workflows/compiler-tests.yaml b/.github/workflows/compiler-tests.yaml
index 52569e2e01..938bd03e6f 100644
--- a/.github/workflows/compiler-tests.yaml
+++ b/.github/workflows/compiler-tests.yaml
@@ -35,7 +35,7 @@ jobs:
   latest-compilers-all-gem5-builds:
     strategy:
       matrix:
-        gem5-compilation: [ARM, ARM_MESI_Three_Level, ARM_MESI_Three_Level_HTM, ARM_MOESI_hammer, Garnet_standalone, GCN3_X86, MIPS, 'NULL', NULL_MESI_Two_Level, NULL_MOESI_CMP_directory, NULL_MOESI_CMP_token, NULL_MOESI_hammer, POWER, RISCV, SPARC, X86, X86_MI_example, X86_MOESI_AMD_Base]
+        gem5-compilation: [ARM, ARM_MESI_Three_Level, ARM_MESI_Three_Level_HTM, ARM_MOESI_hammer, Garnet_standalone, GCN3_X86, MIPS, 'NULL', NULL_MESI_Two_Level, NULL_MOESI_CMP_directory, NULL_MOESI_CMP_token, NULL_MOESI_hammer, POWER, RISCV, SPARC, X86, X86_MI_example, X86_MOESI_AMD_Base, VEGA_X86, GCN3_X86]
         image: [gcc-version-12, clang-version-14]
         opts: [.opt]
     runs-on: [self-hosted, linux, x64, run]
diff --git a/src/arch/amdgpu/vega/insts/instructions.hh b/src/arch/amdgpu/vega/insts/instructions.hh
index d45a84c7b8..0e4ec04764 100644
--- a/src/arch/amdgpu/vega/insts/instructions.hh
+++ b/src/arch/amdgpu/vega/insts/instructions.hh
@@ -31534,8 +31534,8 @@ namespace VegaISA
         } // getOperandSize
 
         void execute(GPUDynInstPtr) override;
-        void initiateAcc(GPUDynInstPtr gpuDynInst);
-        void completeAcc(GPUDynInstPtr gpuDynInst);
+        void initiateAcc(GPUDynInstPtr gpuDynInst) override;
+        void completeAcc(GPUDynInstPtr gpuDynInst) override;
     }; // Inst_DS__DS_OR_B32
 
     class Inst_DS__DS_XOR_B32 : public Inst_DS
diff --git a/src/cpu/testers/gpu_ruby_test/address_manager.cc b/src/cpu/testers/gpu_ruby_test/address_manager.cc
index 37f74203f7..049ba86e51 100644
--- a/src/cpu/testers/gpu_ruby_test/address_manager.cc
+++ b/src/cpu/testers/gpu_ruby_test/address_manager.cc
@@ -32,6 +32,8 @@
 #include "cpu/testers/gpu_ruby_test/address_manager.hh"
 
 #include <algorithm>
+#include <climits>
+#include <random>
 
 #include "base/intmath.hh"
 #include "base/logging.hh"
@@ -58,8 +60,13 @@ AddressManager::AddressManager(int n_atomic_locs, int n_normal_locs_per_atomic)
         randAddressMap[i] = (Addr)((i + 128) << floorLog2(sizeof(Value)));
     }
 
-    // randomly shuffle randAddressMap
-    std::random_shuffle(randAddressMap.begin(), randAddressMap.end());
+    // randomly shuffle randAddressMap. The seed is determined by the random_mt
+    // gem5 rng. This allows for deterministic randomization.
+    std::shuffle(
+        randAddressMap.begin(),
+        randAddressMap.end(),
+        std::default_random_engine(random_mt.random<unsigned>(0,UINT_MAX))
+    );
 
     // initialize atomic locations
     // first and last normal location per atomic location
diff --git a/src/dev/hsa/kfd_ioctl.h b/src/dev/hsa/kfd_ioctl.h
index c953787dc8..b7997c40fc 100644
--- a/src/dev/hsa/kfd_ioctl.h
+++ b/src/dev/hsa/kfd_ioctl.h
@@ -23,9 +23,10 @@
 #ifndef KFD_IOCTL_H_INCLUDED
 #define KFD_IOCTL_H_INCLUDED
 
+#include <sys/ioctl.h>
+#include <sys/types.h>
+
 #include <cstdint>
-#include <linux/ioctl.h>
-#include <linux/types.h>
 
 namespace gem5
 {
diff --git a/tests/compiler-tests.sh b/tests/compiler-tests.sh
index f5d4bb189f..1f180eb5fa 100755
--- a/tests/compiler-tests.sh
+++ b/tests/compiler-tests.sh
@@ -58,6 +58,8 @@ builds=("ALL"
         "POWER"
         "RISCV"
         "SPARC"
+        "GCN3_X86"
+        "VEGA_X86"
         "X86"
         "X86_MI_example"
         "X86_MOESI_AMD_Base")