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x86: remove redundant condition check in tlb code

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This commit is contained in:
Brandon Potter
2017-02-23 13:27:48 -05:00
parent a4c4b4188d
commit 748b87fc36
1 changed files with 4 additions and 7 deletions
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11
src/arch/x86/tlb.cc
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@@ -231,13 +231,10 @@ TLB::finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const
AddrRange m5opRange(0xFFFF0000, 0xFFFFFFFF); AddrRange m5opRange(0xFFFF0000, 0xFFFFFFFF);
if (m5opRange.contains(paddr)) { if (m5opRange.contains(paddr)) {
if (m5opRange.contains(paddr)) { req->setFlags(Request::MMAPPED_IPR | Request::GENERIC_IPR |
req->setFlags(Request::MMAPPED_IPR | Request::GENERIC_IPR | Request::STRICT_ORDER);
Request::STRICT_ORDER); req->setPaddr(GenericISA::iprAddressPseudoInst((paddr >> 8) & 0xFF,
req->setPaddr(GenericISA::iprAddressPseudoInst( paddr & 0xFF));
(paddr >> 8) & 0xFF,
paddr & 0xFF));
}
} else if (FullSystem) { } else if (FullSystem) {
// Check for an access to the local APIC // Check for an access to the local APIC
LocalApicBase localApicBase = LocalApicBase localApicBase =