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dev-amdgpu: Implement MMIO trace reader

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Helper class to read Linux kernel MMIO trace from amdgpu modprobes. This
class is used rather than implementing MMIOs in code as it is easier to
update to newer kernel versions this way. It also helps with setting
values for registers which are not documented.

Based on https://gem5-review.googlesource.com/c/amd/gem5/+/23743

Change-Id: Ia9b85c269c98b6ae0d5bcfe89141a4c30ef2f914
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46160
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Matthew Poremba
2021-05-28 15:20:07 -05:00
parent ca12a8997d
commit 7426a0da8e
5 changed files with 400 additions and 14 deletions
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19
src/dev/amdgpu/amdgpu_device.hh
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@@ -37,11 +37,17 @@
#include <map>
#include "base/bitunion.hh"
#include "dev/amdgpu/mmio_reader.hh"
#include "dev/io_device.hh"
#include "dev/pci/device.hh"
#include "params/AMDGPUDevice.hh"
// By default (no expansion enabled), X86 kernel expects the vga ROM at 0xc0000
/* Names of BARs used by the device. */
constexpr int FRAMEBUFFER_BAR = 0;
constexpr int DOORBELL_BAR = 2;
constexpr int MMIO_BAR = 5;
/* By default the X86 kernel expects the vga ROM at 0xc0000. */
constexpr uint32_t VGA_ROM_DEFAULT = 0xc0000;
constexpr uint32_t ROM_SIZE = 0x20000; // 128kB
@@ -67,15 +73,15 @@ class AMDGPUDevice : public PciDevice
*
* read/writeFrame are used for BAR0 requests
* read/writeDoorbell are used for BAR2 requests
* read/writeMmio are used for BAR5 requests
* read/writeMMIO are used for BAR5 requests
*/
void readFrame(PacketPtr pkt, Addr offset);
void readDoorbell(PacketPtr pkt, Addr offset);
void readMmio(PacketPtr pkt, Addr offset);
void readMMIO(PacketPtr pkt, Addr offset);
void writeFrame(PacketPtr pkt, Addr offset);
void writeDoorbell(PacketPtr pkt, Addr offset);
void writeMmio(PacketPtr pkt, Addr offset);
void writeMMIO(PacketPtr pkt, Addr offset);
/**
* VGA ROM methods
@@ -86,6 +92,11 @@ class AMDGPUDevice : public PciDevice
std::array<uint8_t, ROM_SIZE> rom;
/**
* MMIO reader to populate device registers map.
*/
AMDMMIOReader mmioReader;
/**
* Device registers - Maps register address to register value
*/