diff --git a/src/arch/mips/isa/decoder.isa b/src/arch/mips/isa/decoder.isa
index d35fc1865f..f62000ebea 100644
--- a/src/arch/mips/isa/decoder.isa
+++ b/src/arch/mips/isa/decoder.isa
@@ -1532,7 +1532,7 @@ decode OPCODE_HI default Unknown::unknown() {
                     if (Rs<2:0> == 0) {
                         Fd_ud = Fs_ud;
                     } else if (Rs<2:0> == 4) {
-                        if (GuestByteOrder == BigEndianByteOrder)
+                        if (GuestByteOrder == ByteOrder::big)
                             Fd_ud = Fs_ud<31:0> << 32 | Ft_ud<63:32>;
                         else
                             Fd_ud = Ft_ud<31:0> << 32 | Fs_ud<63:32>;
diff --git a/src/arch/mips/isa/formats/mem.isa b/src/arch/mips/isa/formats/mem.isa
index 4f6f2eea60..491dd0cc17 100644
--- a/src/arch/mips/isa/formats/mem.isa
+++ b/src/arch/mips/isa/formats/mem.isa
@@ -497,7 +497,7 @@ def format LoadUnalignedMemory(memacc_code, ea_code = {{ EA = (Rs + disp) & ~3;
         uint32_t mem_word = Mem_uw;
         uint32_t unalign_addr = Rs + disp;
         uint32_t byte_offset = unalign_addr & 3;
-        if (GuestByteOrder == BigEndianByteOrder)
+        if (GuestByteOrder == ByteOrder::big)
             byte_offset ^= 3;
     '''
 
@@ -515,7 +515,7 @@ def format StoreUnalignedMemory(memacc_code, ea_code = {{ EA = (Rs + disp) & ~3;
         uint32_t mem_word = 0;
         uint32_t unaligned_addr = Rs + disp;
         uint32_t byte_offset = unaligned_addr & 3;
-        if (GuestByteOrder == BigEndianByteOrder)
+        if (GuestByteOrder == ByteOrder::big)
             byte_offset ^= 3;
         fault = readMemAtomicLE(xc, traceData, EA, mem_word, memAccessFlags);
     '''