From 6fd4feb79774e7c4a1d13d8af8c37c211e262951 Mon Sep 17 00:00:00 2001 From: Roger Chang Date: Tue, 31 Oct 2023 14:34:28 +0800 Subject: [PATCH] arch-riscv: fatal_if the process run without SU modes Change-Id: Ifce7eec6cea10881964c29d206a92f3d10271de6 --- src/arch/riscv/process.cc | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/arch/riscv/process.cc b/src/arch/riscv/process.cc index cd00f5d63a..a9ad7b1d32 100644 --- a/src/arch/riscv/process.cc +++ b/src/arch/riscv/process.cc @@ -106,6 +106,10 @@ RiscvProcess64::initState() tc->setMiscRegNoEffect(MISCREG_PRV, PRV_U); auto *isa = dynamic_cast(tc->getIsaPtr()); fatal_if(isa->rvType() != RV64, "RISC V CPU should run in 64 bits mode"); + MISA misa = tc->readMiscRegNoEffect(MISCREG_ISA); + fatal_if(!(misa.rvu && misa.rvs), + "RISC V SE mode can't run without supervisor and user " + "privilege modes."); } } @@ -120,6 +124,10 @@ RiscvProcess32::initState() tc->setMiscRegNoEffect(MISCREG_PRV, PRV_U); auto *isa = dynamic_cast(tc->getIsaPtr()); fatal_if(isa->rvType() != RV32, "RISC V CPU should run in 32 bits mode"); + MISA misa = tc->readMiscRegNoEffect(MISCREG_ISA); + fatal_if(!(misa.rvu && misa.rvs), + "RISC V SE mode can't run without supervisor and user " + "privilege modes."); } }