make ide disk work for newmem

SConscript:
    compile ide devices
base/chunk_generator.hh:
    add another parameter to the chuck generator called complete() which
    returns the number of bytes transfered so far. Very useful for
    adding to a pointer.
configs/test/fs.py:
    Add ide disk to fs test configuration
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/io_device.cc:
dev/io_device.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
    update for new memory system
mem/bus.cc:
    support devices that return multiple ranges
    remove old ranges before using new info
mem/packet.hh:
    make senderstate void* per steve's request that we use every
    construct possible in C++
mem/physical.cc:
    have memory stamp the packet with the time.
mem/physical.hh:
    actually set the memory latency variable
python/m5/objects/Device.py:
    Add DmaDevice
python/m5/objects/Ide.py:
    Ide disk no longer has a physmem pointer
python/m5/objects/Pci.py:
    update pci device for newmem
python/m5/objects/PhysicalMemory.py:
    add latency parameter for physical memory
sim/byteswap.hh:
    use fast architecture dependent byteswap calls if they exist

--HG--
extra : convert_revision : e3cf2e8f61064ad302d94bc22010a00c59f3f793

python/m5/objects/Device.py

@@ -12,3 +12,7 @@ class BasicPioDevice(PioDevice):
     abstract = True
     pio_addr = Param.Addr("Device Address")
     pio_latency = Param.Tick(1, "Programmed IO latency in simticks")
+
+class DmaDevice(PioDevice):
+    type = 'DmaDevice'
+    abstract = True

python/m5/objects/Ide.py

@@ -8,7 +8,6 @@ class IdeDisk(SimObject):
     delay = Param.Latency('1us', "Fixed disk delay in microseconds")
     driveID = Param.IdeID('master', "Drive ID")
     image = Param.DiskImage("Disk image")
-    physmem = Param.PhysicalMemory(Parent.any, "Physical memory")
 
 class IdeController(PciDevice):
     type = 'IdeController'

python/m5/objects/Pci.py

@@ -1,6 +1,5 @@
 from m5 import *
-from Device import BasicPioDevice
-#, DmaDevice
+from Device import BasicPioDevice, DmaDevice
 
 class PciConfigData(SimObject):
     type = 'PciConfigData'
@@ -42,15 +41,15 @@ class PciConfigData(SimObject):
 class PciConfigAll(BasicPioDevice):
     type = 'PciConfigAll'
 
-#class PciDevice(DmaDevice):
-#    type = 'PciDevice'
-#    abstract = True
-#    addr = 0xffffffffL
-#    pci_bus = Param.Int("PCI bus")
-#    pci_dev = Param.Int("PCI device number")
-#    pci_func = Param.Int("PCI function code")
-#    configdata = Param.PciConfigData(Parent.any, "PCI Config data")
-#    configspace = Param.PciConfigAll(Parent.any, "PCI Configspace")
-#
-#class PciFake(PciDevice):
-#    type = 'PciFake'
+class PciDevice(DmaDevice):
+    type = 'PciDevice'
+    abstract = True
+    pci_bus = Param.Int("PCI bus")
+    pci_dev = Param.Int("PCI device number")
+    pci_func = Param.Int("PCI function code")
+    pio_latency = Param.Tick(1, "Programmed IO latency in simticks")
+    configdata = Param.PciConfigData(Parent.any, "PCI Config data")
+    configspace = Param.PciConfigAll(Parent.any, "PCI Configspace")
+
+class PciFake(PciDevice):
+    type = 'PciFake'

python/m5/objects/PhysicalMemory.py

@@ -1,7 +1,8 @@
 from m5 import *
-from Memory import Memory
+from MemObject import *
 
-class PhysicalMemory(Memory):
+class PhysicalMemory(MemObject):
     type = 'PhysicalMemory'
     range = Param.AddrRange("Device Address")
     file = Param.String('', "memory mapped file")
+    latency = Param.Latency('10ns', "latency of an access")