diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index 0187567e95..48aecf138d 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -1008,6 +1008,11 @@ let {{
             DestReg = SegLimitSrc1;
         '''
 
+    class RdAttr(SegOp):
+        code = '''
+            DestReg = SegAttrSrc1;
+        '''
+
     class Rdsel(SegOp):
         code = '''
             DestReg = SegSelSrc1;