power: Add basic DVFS support for gem5

Adds DVFS capabilities to gem5, by allowing users to specify lists for
frequencies and voltages in SrcClockDomains and VoltageDomains respectively.
A separate component, DVFSHandler, provides a small interface to change
operating points of the associated domains.

Clock domains will be linked to voltage domains and thus allow separate clock,
but shared voltage lines.

Currently all the valid performance-level updates are performed with a fixed
transition latency as specified for the domain.

Config file example:
...
vd = VoltageDomain(voltage = ['1V','0.95V','0.90V','0.85V'])
tsys.cluster1.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster2.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster1.clk_domain.domain_id = 0
tsys.cluster2.clk_domain.domain_id = 1
tsys.cluster1.clk_domain.voltage_domain = vd
tsys.cluster2.clk_domain.voltage_domain = vd
tsys.dvfs_handler.domains = [tsys.cluster1.clk_domain,
                             tsys.cluster2.clk_domain]
tsys.dvfs_handler.enable = True
This commit is contained in:
Stephan Diestelhorst
2014-06-30 13:56:06 -04:00
parent 641e602830
commit 65cea4708e
14 changed files with 865 additions and 46 deletions

View File

@@ -36,6 +36,7 @@ SimObject('Root.py')
SimObject('ClockDomain.py')
SimObject('VoltageDomain.py')
SimObject('System.py')
SimObject('DVFSHandler.py')
Source('arguments.cc')
Source('async.cc')
@@ -55,6 +56,7 @@ Source('stat_control.cc')
Source('clock_domain.cc')
Source('voltage_domain.cc')
Source('system.cc')
Source('dvfs_handler.cc')
if env['TARGET_ISA'] != 'null':
SimObject('InstTracer.py')
@@ -86,3 +88,4 @@ DebugFlag('VtoPhys')
DebugFlag('WorkItems')
DebugFlag('ClockDomain')
DebugFlag('VoltageDomain')
DebugFlag('DVFS')