arch-arm: Add missing override keywords in fault.hh

Change-Id: I94a4bf4a633aeed550f8c01ccae824add3b85eb0
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/4284
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
This commit is contained in:
Andreas Sandberg
2017-06-23 13:56:35 +01:00
parent fda84faad4
commit 653d2ee29a

View File

@@ -183,7 +183,7 @@ class ArmFault : public FaultBase
MiscRegIndex getFaultAddrReg64() const;
void invoke(ThreadContext *tc, const StaticInstPtr &inst =
StaticInst::nullStaticInstPtr);
StaticInst::nullStaticInstPtr) override;
void invoke64(ThreadContext *tc, const StaticInstPtr &inst =
StaticInst::nullStaticInstPtr);
virtual void annotate(AnnotationIDs id, uint64_t val) {}
@@ -215,13 +215,11 @@ class ArmFaultVals : public ArmFault
public:
ArmFaultVals<T>(ExtMachInst _machInst = 0, uint32_t _iss = 0) :
ArmFault(_machInst, _iss) {}
FaultName name() const { return vals.name; }
FaultStat & countStat() { return vals.count; }
FaultOffset offset(ThreadContext *tc);
FaultName name() const override { return vals.name; }
FaultStat & countStat() override { return vals.count; }
FaultOffset offset(ThreadContext *tc) override;
FaultOffset
offset64()
{
FaultOffset offset64() override {
if (toEL == fromEL) {
if (opModeIsT(fromMode))
return vals.currELTOffset;
@@ -233,25 +231,31 @@ class ArmFaultVals : public ArmFault
}
}
OperatingMode nextMode() { return vals.nextMode; }
virtual bool routeToMonitor(ThreadContext *tc) const { return false; }
uint8_t armPcOffset(bool isHyp) { return isHyp ? vals.armPcElrOffset
: vals.armPcOffset; }
uint8_t thumbPcOffset(bool isHyp) { return isHyp ? vals.thumbPcElrOffset
: vals.thumbPcOffset; }
uint8_t armPcElrOffset() { return vals.armPcElrOffset; }
uint8_t thumbPcElrOffset() { return vals.thumbPcElrOffset; }
virtual bool abortDisable(ThreadContext* tc) { return vals.abortDisable; }
virtual bool fiqDisable(ThreadContext* tc) { return vals.fiqDisable; }
virtual ExceptionClass ec(ThreadContext *tc) const { return vals.ec; }
virtual uint32_t iss() const { return issRaw; }
OperatingMode nextMode() override { return vals.nextMode; }
virtual bool routeToMonitor(ThreadContext *tc) const override {
return false;
}
uint8_t armPcOffset(bool isHyp) override {
return isHyp ? vals.armPcElrOffset
: vals.armPcOffset;
}
uint8_t thumbPcOffset(bool isHyp) override {
return isHyp ? vals.thumbPcElrOffset
: vals.thumbPcOffset;
}
uint8_t armPcElrOffset() override { return vals.armPcElrOffset; }
uint8_t thumbPcElrOffset() override { return vals.thumbPcElrOffset; }
bool abortDisable(ThreadContext* tc) override { return vals.abortDisable; }
bool fiqDisable(ThreadContext* tc) override { return vals.fiqDisable; }
ExceptionClass ec(ThreadContext *tc) const override { return vals.ec; }
uint32_t iss() const override { return issRaw; }
};
class Reset : public ArmFaultVals<Reset>
{
public:
void invoke(ThreadContext *tc, const StaticInstPtr &inst =
StaticInst::nullStaticInstPtr);
StaticInst::nullStaticInstPtr) override;
};
class UndefinedInstruction : public ArmFaultVals<UndefinedInstruction>
@@ -279,10 +283,10 @@ class UndefinedInstruction : public ArmFaultVals<UndefinedInstruction>
{}
void invoke(ThreadContext *tc, const StaticInstPtr &inst =
StaticInst::nullStaticInstPtr);
bool routeToHyp(ThreadContext *tc) const;
ExceptionClass ec(ThreadContext *tc) const;
uint32_t iss() const;
StaticInst::nullStaticInstPtr) override;
bool routeToHyp(ThreadContext *tc) const override;
ExceptionClass ec(ThreadContext *tc) const override;
uint32_t iss() const override;
};
class SupervisorCall : public ArmFaultVals<SupervisorCall>
@@ -297,10 +301,10 @@ class SupervisorCall : public ArmFaultVals<SupervisorCall>
{}
void invoke(ThreadContext *tc, const StaticInstPtr &inst =
StaticInst::nullStaticInstPtr);
bool routeToHyp(ThreadContext *tc) const;
ExceptionClass ec(ThreadContext *tc) const;
uint32_t iss() const;
StaticInst::nullStaticInstPtr) override;
bool routeToHyp(ThreadContext *tc) const override;
ExceptionClass ec(ThreadContext *tc) const override;
uint32_t iss() const override;
};
class SecureMonitorCall : public ArmFaultVals<SecureMonitorCall>
@@ -311,9 +315,9 @@ class SecureMonitorCall : public ArmFaultVals<SecureMonitorCall>
{}
void invoke(ThreadContext *tc, const StaticInstPtr &inst =
StaticInst::nullStaticInstPtr);
ExceptionClass ec(ThreadContext *tc) const;
uint32_t iss() const;
StaticInst::nullStaticInstPtr) override;
ExceptionClass ec(ThreadContext *tc) const override;
uint32_t iss() const override;
};
class SupervisorTrap : public ArmFaultVals<SupervisorTrap>
@@ -329,7 +333,7 @@ class SupervisorTrap : public ArmFaultVals<SupervisorTrap>
overrideEc(_overrideEc)
{}
ExceptionClass ec(ThreadContext *tc) const;
ExceptionClass ec(ThreadContext *tc) const override;
};
class SecureMonitorTrap : public ArmFaultVals<SecureMonitorTrap>
@@ -345,7 +349,7 @@ class SecureMonitorTrap : public ArmFaultVals<SecureMonitorTrap>
overrideEc(_overrideEc)
{}
ExceptionClass ec(ThreadContext *tc) const;
ExceptionClass ec(ThreadContext *tc) const override;
};
class HypervisorCall : public ArmFaultVals<HypervisorCall>
@@ -353,7 +357,7 @@ class HypervisorCall : public ArmFaultVals<HypervisorCall>
public:
HypervisorCall(ExtMachInst _machInst, uint32_t _imm);
ExceptionClass ec(ThreadContext *tc) const;
ExceptionClass ec(ThreadContext *tc) const override;
};
class HypervisorTrap : public ArmFaultVals<HypervisorTrap>
@@ -369,7 +373,7 @@ class HypervisorTrap : public ArmFaultVals<HypervisorTrap>
overrideEc(_overrideEc)
{}
ExceptionClass ec(ThreadContext *tc) const;
ExceptionClass ec(ThreadContext *tc) const override;
};
template <class T>
@@ -407,13 +411,13 @@ class AbortFault : public ArmFaultVals<T>
{}
void invoke(ThreadContext *tc, const StaticInstPtr &inst =
StaticInst::nullStaticInstPtr);
StaticInst::nullStaticInstPtr) override;
FSR getFsr(ThreadContext *tc);
bool abortDisable(ThreadContext *tc);
uint32_t iss() const;
bool isStage2() const { return stage2; }
void annotate(ArmFault::AnnotationIDs id, uint64_t val);
FSR getFsr(ThreadContext *tc) override;
bool abortDisable(ThreadContext *tc) override;
uint32_t iss() const override;
bool isStage2() const override { return stage2; }
void annotate(ArmFault::AnnotationIDs id, uint64_t val) override;
bool isMMUFault() const;
};
@@ -430,10 +434,10 @@ class PrefetchAbort : public AbortFault<PrefetchAbort>
_source, _stage2, _tranMethod)
{}
ExceptionClass ec(ThreadContext *tc) const;
ExceptionClass ec(ThreadContext *tc) const override;
// @todo: external aborts should be routed if SCR.EA == 1
bool routeToMonitor(ThreadContext *tc) const;
bool routeToHyp(ThreadContext *tc) const;
bool routeToMonitor(ThreadContext *tc) const override;
bool routeToHyp(ThreadContext *tc) const override;
};
class DataAbort : public AbortFault<DataAbort>
@@ -458,12 +462,12 @@ class DataAbort : public AbortFault<DataAbort>
isv(false), sas (0), sse(0), srt(0), sf(false), ar(false)
{}
ExceptionClass ec(ThreadContext *tc) const;
ExceptionClass ec(ThreadContext *tc) const override;
// @todo: external aborts should be routed if SCR.EA == 1
bool routeToMonitor(ThreadContext *tc) const;
bool routeToHyp(ThreadContext *tc) const;
uint32_t iss() const;
void annotate(AnnotationIDs id, uint64_t val);
bool routeToMonitor(ThreadContext *tc) const override;
bool routeToHyp(ThreadContext *tc) const override;
uint32_t iss() const override;
void annotate(AnnotationIDs id, uint64_t val) override;
};
class VirtualDataAbort : public AbortFault<VirtualDataAbort>
@@ -478,15 +482,15 @@ class VirtualDataAbort : public AbortFault<VirtualDataAbort>
AbortFault<VirtualDataAbort>(_addr, _write, _domain, _source, false)
{}
void invoke(ThreadContext *tc, const StaticInstPtr &inst);
void invoke(ThreadContext *tc, const StaticInstPtr &inst) override;
};
class Interrupt : public ArmFaultVals<Interrupt>
{
public:
bool routeToMonitor(ThreadContext *tc) const;
bool routeToHyp(ThreadContext *tc) const;
bool abortDisable(ThreadContext *tc);
bool routeToMonitor(ThreadContext *tc) const override;
bool routeToHyp(ThreadContext *tc) const override;
bool abortDisable(ThreadContext *tc) override;
};
class VirtualInterrupt : public ArmFaultVals<VirtualInterrupt>
@@ -498,10 +502,10 @@ class VirtualInterrupt : public ArmFaultVals<VirtualInterrupt>
class FastInterrupt : public ArmFaultVals<FastInterrupt>
{
public:
bool routeToMonitor(ThreadContext *tc) const;
bool routeToHyp(ThreadContext *tc) const;
bool abortDisable(ThreadContext *tc);
bool fiqDisable(ThreadContext *tc);
bool routeToMonitor(ThreadContext *tc) const override;
bool routeToHyp(ThreadContext *tc) const override;
bool abortDisable(ThreadContext *tc) override;
bool fiqDisable(ThreadContext *tc) override;
};
class VirtualFastInterrupt : public ArmFaultVals<VirtualFastInterrupt>
@@ -520,7 +524,7 @@ class PCAlignmentFault : public ArmFaultVals<PCAlignmentFault>
PCAlignmentFault(Addr _faultPC) : faultPC(_faultPC)
{}
void invoke(ThreadContext *tc, const StaticInstPtr &inst =
StaticInst::nullStaticInstPtr);
StaticInst::nullStaticInstPtr) override;
};
/// Stack pointer alignment fault (AArch64 only)
@@ -536,9 +540,9 @@ class SystemError : public ArmFaultVals<SystemError>
public:
SystemError();
void invoke(ThreadContext *tc, const StaticInstPtr &inst =
StaticInst::nullStaticInstPtr);
bool routeToMonitor(ThreadContext *tc) const;
bool routeToHyp(ThreadContext *tc) const;
StaticInst::nullStaticInstPtr) override;
bool routeToMonitor(ThreadContext *tc) const override;
bool routeToHyp(ThreadContext *tc) const override;
};
// A fault that flushes the pipe, excluding the faulting instructions
@@ -547,7 +551,7 @@ class FlushPipe : public ArmFaultVals<FlushPipe>
public:
FlushPipe() {}
void invoke(ThreadContext *tc, const StaticInstPtr &inst =
StaticInst::nullStaticInstPtr);
StaticInst::nullStaticInstPtr) override;
};
// A fault that flushes the pipe, excluding the faulting instructions
@@ -556,7 +560,7 @@ class ArmSev : public ArmFaultVals<ArmSev>
public:
ArmSev () {}
void invoke(ThreadContext *tc, const StaticInstPtr &inst =
StaticInst::nullStaticInstPtr);
StaticInst::nullStaticInstPtr) override;
};
/// Illegal Instruction Set State fault (AArch64 only)